Yibo Chen
 |
Ph.D. Candidate |
Bio
Yibo received his bachelor’s and master’s degrees from Department of Electronic Engineering, Tsinghua University, Beijing, in 2005 and 2007, respectively. Now he is pursuing his Ph.D degree in the Microsystem Design Lab (MDL) with Prof. Yuan Xie, in Department of Computer Science and Engineering, the Pennsylvania State University.
Yibo’s Curriculum Vitae is available here (PDF).
Research Interests
Statistical timing and power analysis of VLSI circuits
Variability aware high-level synthesis (HLS)
Three-dimentional (3D) IC design and testing methodologies
Publications
Guangyu Sun, Yongsoo Joo, Yibo Chen, Yuan Xie, Yiran Chen, Hai Li. A Hybrid Solid-State Storage Architecture for the Performance, Energy Consumption, and Lifetime Improvement. to appear at The International Symposium on High-Performance Computer Architecture (HPCA), 2010.
Yibo Chen, Yu Wang, Yuan Xie, Andres Takach. Minimizing Leakage Power in Aging-Bounded High-level Synthesis with Design Time Multi-Vth Assignment. to appear in Asia and South Pacific Design Automation Conference (ASPDAC), 2010.
Yibo Chen, Yu Wang, Yuan Xie, Andres Takach. Parametric Yield Driven Resource Binding in Behavioral Synthesis with Multi-Vth/Vdd Library. to appear in Asia and South Pacific Design Automation Conference (ASPDAC), 2010.
Jin Ouyang, Guangyu Sun, Yibo Chen, Lian Duan, Tao Zhang, Yuan Xie, and Mary J. Irwin. Arithmetic Unit Design Using 180nm TSV-based 3D Stacking Technology. in International 3D-System Integration Conference (3D-SIC), 2009
Yibo Chen, Yuan Xie. Variation-Aware Power Optimization in High-Level Synthesis using Multi-Vth/Vdd Library. in SRC TECHCON Annual Conference, 2009.
Yuan Xie, Yibo Chen. Statistical High-Level Synthesis under Process Variability. in IEEE Design and Test of Computers, vol.26, no.4, pp.78-87, 2009.
Yibo Chen, Yuan Xie. Tolerating Process Variations in High-Level Synthesis Using Transparent Latches. in Asia and South Pacific Design Automation Conference (ASPDAC), 2009.
Xiaoxia Wu, Yibo Chen, Krishnendu Chakrabarty, and Yuan Xie. Test-Access Mechanism Optimization for Core-Based Three-Dimensional SOCs. in International Conference on Computer Design (ICCD), 2008
Yibo Chen, Yuan Xie. ILP-based Scheme for Timing Variation-aware Scheduling and Resource Binding. in IEEE System-on-Chip Conference (SOCC), 2008.
Yibo Chen, Yuan Xie. Statistical High-level Synthesis Considering Process Variations. in HLS Workshop in conjunction with Design Automation Conference (DAC), 2008.
Yibo Chen, Rong Luo. Design and Implementation of a WiFi-based Local Locating System. in IEEE International Conference on Portable Information Devices, 2007
Ku He, Yibo Chen, Rong Luo. A System Level Fine-Grained Dynamic Voltage and Frequency Scaling for Portable Embedded Systems with Multiple Frequency Adjustable Components. in IEEE International Conference on Portable Information Devices, 2007
Courses
07 FALL
CSE578 CAD Tools
CSE598E Chip Multiprocessor
08 SPRING
CMPEN411 Digital Integrated Circuits
CSE513 Distributed System
08 FALL
CSE530 Modern Computer Architecture
CSE575 Computer Arithmetic
CSE598G Secure/Emergent Networks