Tutorial: Emerging Technologies and Their Impact on System Design

Co-located with the 15th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS 2010)

Sheraton Station Square, Pittsburgh, PA,

9:00 AM to 12:00 noon, March 14 (Sunday), 2010

The growing complexity of advanced deep-submicron technology used to build systems has resulted in many design challenges for future Exascale computing systems, such as system power limits, limited communication bandwidth and latency, and reduced system reliability due to increasing transient error rates. At the same time, various disruptive emerging technologies promise dramatically improved performance at the device level. How likely are these improvements and what impact will they have at the system level?

In this tutorial, we present an overview of three emerging technologies: optical interconnect, 3D integration, and new non-volatile memory technologies. We describe the fundamentals and current status of each technology, introduce the advantages of the technologies, and discuss the design challenges inherent in adoption of the technologies. We conclude with their possible impact on large-scale system performance.

ORGANIZERS: Norman P. Jouppi (HP Labs), Yuan Xie (Penn State)

AGENDA:

Tutorial Slides

Time Topic
9:00-9:10 Overview of the current trends for future computing system
9:10-9:20 Design challenges for such trend: performance/power/reliability
9:20-9:35 Brief introduction on optical interconnect
9:35-10:20 The application of optical interconnect for future computing systems as chip-to-chip interconnect and on-chip interconnect
10:20-10:30 Brief introduction on 3D integration technology
10:30-11:00 The application of 3D integration for future computing systems
11:00-11:15 Brief introduction on emerging NVM (MRAM and PCRAM)
11:00-11:45 The application of emerging NVM for future computing systems
11:45-12:00 The design concerns for the applications of such emerging technologies in future computing systems

SPEAKERS BIOGRAPHY:

Norman P. Jouppi is is a fellow and director of the Exascale Computing Lab at HP Labs, the company’s central research and development arm, overseeing research on building next-generation hardware and software compute infrastructure using a cross-layer inter-disciplinary approach. Jouppi is well-known for his innovations in computer memory systems, including stream prefetch buffers, victim caching, multi-level exclusive caching and development of the CACTI tool for modeling cache timing, area and power. His research innovations have been adopted in microprocessors from most high-performance microprocessor vendors.He has also been the principal architect and lead designer of several microprocessors, contributed to the architecture and design of graphics accelerators, and extensively researched video, audio and physical telepresence.His recent work includes implications of emerging nanophotonic technology on computer systems, low-latency high-bandwidth networking for cluster computing, heterogeneous chip multiprocessor architectures, and blade system architectures.Jouppi joined HP in 2002 from Compaq Computer Corp., where he was a staff fellow at Compaq’s Western Research Laboratory in Palo Alto, Calif.From 1984 through 1996, he was a consulting assistant/associate professor in the department of electrical engineering at Stanford University, where he taught classes in VLSI, circuits and computer architecture.Jouppi received his Ph.D. in electrical engineering from Stanford University in 1984, and a master of science in electrical engineering from Northwestern University in 1980. While at Stanford, he was one of the principal architects and designers of the MIPS microprocessor, as well as a developer of techniques for CMOS VLSI timing verification.

Yuan Xie is an Associate Professor in Computer Science and Engineering department at the Pennsylvania State University. He received Ph.D. degrees in electrical engineering from Princeton University. Before joining Penn State in Fall 2003, he was with IBM Microelectronic Division. He was a recipient of the NSF CAREER award in 2006, and IBM Faculty Award in 2008. His research topics includes VLSI design,computer architecture, design automation, and embedded system designs, with a focus on emerging technologies, including three-dimensional integrated circuits (3D ICs) and emerging non-volatile memories. He is currently Associate Editor for IEEE Transaction on VLSI and IET Computers and Digital Techniques. He is also a co-editor for the book titled "Three Dimensional Integrated Circuit Design: EDA Design and Microarchitectures" published in 2009.