My research interest is three-dimensional (3D) IC Design, including 3D VLSI EDA tools, 3D Computer Architecture, and 3D IC testing.
Journal Papers:
[JETC] Xiaoxia Wu, P. Falkenstern, K. Chakrabarty, Yuan Xie, "Scan-chain Design and Optimization for 3D ICs", To appear in ACM Journal of Emerging Technologies for Computer Systems, 2008.
[IEE-CDT] Feng Wang, Mike Debole, Xiaoxia Wu, Yuan Xie, N.Vijaykrishnan, M.J.Irwin. "On-chip Bus Thermal Analysis and Optimization", IEE Computer Design and Test, 2007
Xiaoxia Wu, Yuanqing Ge, "The implementation of USB device interface IP Core", Microelectronics & Computer, 2005 (In Chinese)
Conference Papers and workshop:
[ICCD] Xiaoxia Wu, Yibo Chen, K. Chakrabarty, Yuan Xie, "Test-Access Mechanism Optimization for Core-Based Three-Dimensional SOCs", To appear in International Conference on Computer Design, 2008.
[ITSW] Xiaoxia Wu, P. Falkenstern, K. Chakrabarty, Yuan Xie, "Scan-chain Design and Optimization for 3D ICs", International Test Syntehsis Workshop, 2008
[DAC] Xiangyu Dong, Xiaoxia Wu, Guangyu Sun, Helen Li, Yiran Chen, Yuan Xie. "Circuit and Mircoarchitecture Evaluation of 3D Stacking Magnetic RAM (MRAM) as a Universal Memory Replacement", DAC, 2008.
[ASPDAC] Feng Wang, Xiaoxia Wu, Yuan Xie. "Variability-Driven Module Selection with Joint Design Time Optimization and Post-Silicon Tuning", ASPDAC, 2008. Best Paper Award.
[ICCD] Xiaoxia Wu, Paul Falkenstern, and Yuan Xie. "Scan Chain Design for Three-dimensional ICs", International Conference on Computer Design, 2007.
[EITC] Xiaoxia Wu, Paul Falkenstern, and Yuan Xie. "Design Automation Challenges for Three-dimensional ICs", The seventh annual Emerging Information Technology Conference, 2007.
[ICCAD] Feng Wang, C. A. Nicopoulos, Xiaoxia Wu, Yuan Xie, N.Vijaykrishnan, "Variation-aware Task Allocation and Scheduling for MPSoC", ICCAD, 2007
[SOCC] Xiaoxia Wu, Feng Wang, Yuan Xie, "Analysis of Sub-threshold FinFET Circuits for Ultra-low Power Design", IEEE International SOC Conference, 2006
[ICCAD] Wei-lun Hung, Xiaoxia Wu, Yuan Xie, "Guaranteeing Performance Yield in High-Level Synthesis", IEEE International Conference on Computer-Aided Design, 2006. Best Paper Award Nomination