VLSI, Embedded and Mobile Systems

Narayanan’s research has focused on VLSI architectures for image processing, clocking network, and memory system design for embedded systems. His current work focuses on mobile security and on techniques to optimize both computation and transmission power at various layers of the wireless protocol stack. His new research thrust includes investigation of architectures for nanotechnologies as continued VLSI scaling faces physical and economical challenges.

Students:

Past: J. Zhao (Synopsys), X. Xu

Current Students:

Ph.D.: B. Kang; J. Lee, R. Ramanarayanan, H. Saputra

Selected Publications

1. Boonsiriwattanakul, S., A. R. Hurson, N. Vijaykrishnan, C. Chehadeh. July-August 1999. Energy-Efficient Indexing on Parallel Air Channels in a Mobile Database Access System. Proceedings of the Third World Multiconference on Systemics, Cybernetics and Informatics and the Fifth International Conference on Information Systems Analysis and Synthesis. 4:30-38.

2. Juran, J., A. R. Hurson, N. Vijaykrishnan, S. Boonsiriwattanakul. December 2000. Data Organization and Retrieval on Parallel Air Channels: Performance and Energy Issues. Proceedings of the Seventh International Conference on High Performance Computing (HiPC 2000). Springer-Verlag Lecture Notes in Computer Science 1970:501-510.

3. Kang, B-T., N. Vijaykrishnan, M. J. Irwin, R. Chandramouli. May 2002. Power Efficient Adaptive M-QAM Design Using Adaptive Pipelined Analog-to-Digital Converter. Proceedings of the International Conference on Acoustics, Speech and Signal Processing (ICASSP 2002). (CD ROM Proceedings).

4. Zhao, J., R. Chandramouli, N.  Vijaykrishnan, M. J. Irwin, B. Kang, S. Somasundaram. September 2002. Influence of MPEG-4 Parameters on System Energy. Proceedings of the Fifteenth Annual IEEE International ASIC/SOC Conference. pp. 137-142.

5. Ranganathan, N., N. Vijaykrishnan, N. Bhavanishankar. August 1998. A Linear Array Processor with Dynamic Frequency Clocking for Image Processing Applications. IEEE Transactions on Circuits and Systems for Video Technology 8(4):435-445.

6. Chen, R. Y., N. Vijaykrishnan, M. J. Irwin. April 1999. Clock Power Issues in System-on-a-Chip Designs. Proceedings of the IEEE Computer Society Annual Workshop on VLSI: System Level Design (WVLSI '99). pp. 48-53.

7. Hu, J. S., M. Kandemir, N. Vijaykrishnan, M. J. Irwin, H. Saputra, W. Zhang. June 2002. Compiler-Directed Cache Polymorphism. Proceedings of the ACM SIGPLAN Joint Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES'02) and Software and Compilers for Embedded Systems (SCOPES'02). pp. 165-174

8. Kadayif, I., M. Kandemir, N. Vijaykrishnan, M. J. Irwin. April 2002. Hardware-Software Co-Adaption for Data-Intensive Embedded Applications. Proceedings of the IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2002). pp. 20-25.

9. Kandemir, M., J. Ramanujam, M. J. Irwin, N. Vijaykrishnan, I. Kadayif, A. Parikh. June 2001. Dynamic Management of Scratch-pad Memory Space. Proceedings of the Thirty-Eighth Design Automation Conference (DAC '01). pp. 690-695.