• A. Articles Published in Refereed Proceedings
      • Zhang, Y., J. Liu, M. Kandemir. June 2012. Software-Directed Data Access Scheduling for Reducing Disk Energy Consumption. Proceedings of the Thirty-Second International Conference on Distributed Computing Systems (ICDCS 2012). Macau, China.
      • Liu, J., Y. Zhang, O. Jang, W. Ding, M. Kandemir. June 2012. A Compiler Framework for Extracting Superword Level Parallelism. Proceedings of the International Conference on Programming Language Design and Implementation (PLDI 2012). Beijing, China.
      • Zhao, H., O. Jang, W. Ding, Y. Zhang, M. Kandemir, M. J. Irwin. June 2012. A Hybrid NoC Design for Cache Coherence Optimization for Chip Multiprocessors. Proceedings of the Forty-Ninth Annual Design Automation Conference (DAC 2012). pp. 834-842. San Francisco, CA.
      • Sharifi, A., S. Srikantaiah, M. Kandemir, M. J. Irwin. June 2012. Courteous Cache Sharing: Being Nice to Others in Capacity Management. Proceedings of the Forty-Ninth Annual Design Automation Conference (DAC 2012). pp. 678-687. San Francisco,
      • Kislal, O., P. Berman, M. Kandemir. May 2012. Improving the Performance of k-means Clustering through Computation Skipping and Data Locality Optimizations. Proceedings of the Computer Frontiers Conference (CF 2012). pp. 273-276. Caligari, Italy.
      • Muralidhara, S. P., M. Kandemir, O. Kislal. May 2012. Reuse Distance Based Performance Modeling and Workload Mapping. Proceedings of the Computer Frontiers Conference (CF 2012). pp. 193-202. Caligari, Italy.
      • Liu, J., N. Ravi, S. Chakradhar, M. Kandemir. April 2012. Panacea: Towards Holistic Optimization of MapReduce Applications. Proceedings of the 2012 International Symposium on Code Generation and Optimization (CGO 2012). (Awaiting page numbers). San Jose, CA.
      • Oz, I., H. Topcuoglu, M. Kandemir, O. Tosun. March 2012. Performance-reliability Tradeoff Analysis for Multithreaded Applications. Proceedings of the Design, Automation & Test in Europe Conference & Exhibition (DATE 2012). pp. 893-898. Dresden, Germany.
      • Wang, W., T. Dey, R. Moore, M. Aktasoglu, B. Childers, J. Davidson, M. J. Irwin, M. Kandemir, M. Soffa. March 2012. REEact: A Customizable Virtual Execution Manager for Multicore Platforms. Proceedings of the Eighth International Conference on Virtual Execution Environments (VEE 2012), in conjunction with ASPLOS 2012. pp. 27-38. London, UK.
      • Demiroz, B., H. Topcuoglu, M. Kandemir, O. Tosun. February 2012. Locality-Aware Dynamic Mapping for Multithreaded Applications. Proceedings of the Twentieth Euromicro International Conference on Parallel, Distributed and Network-Based Processing (PDP 2012). pp. 185-189. Munich, Germany.
      • Zhang, Y., W. Ding, M. Kandemir, J. Liu, O. Jang. December 2011. A Data Layout Optimization Framework for NUCA-based Multicores. Proceedings of the Forty-Fourth Annual IEEE/ACM International Symposium on Microarchitecture (MICRO 2011). pp. 489-500. Porto Alegre, Brazil.
      • Muralidhara, S. P., L. Subramanian, O. Mutlu, M. Kandemir, T. Moscibroda. December 2011. Reducing Memory Interference in Multicore Systems via Application-aware Memory Channel Partitioning. Proceedings of the Forty-Fourth Annual IEEE/ACM International Symposium on Microarchitecture (MICRO 2011). pp. 374-385. Porto Alegre, Brazil.
      • Frasca, M., R. Prabhakar, P. Raghavan, M. Kandemir. November 2011. Virtual I/O Caching: Dynamic Storage Cache Management for Concurrent Workloads. Proceedings of the International Conference for High Performance Computing, Networking, Storage and Analysis (SC 2011). 11 pages. Seattle, WA.
      • Zhao, H., M. Kandemir, W. Ding, M. J. Irwin. November 2011. Exploring Heterogeneous NoC Design Space. Proceedings of the IEEE/ACM 2011 International Conference on Computer-Aided Design (ICCAD 2011). pp. 787-793. San Jose, CA.
      • Ding, W., Y. Zhang, J. Liu, M. Kandemir. November 2011. Optimizing Data Locality using Array Tiling. Proceedings of the IEEE/ACM 2011 International Conference on Computer-Aided Design (ICCAD 2011). pp. 142-149. San Jose, CA.
      • Yedlapalli, P., E. Kultursay, M. Kandemir. November 2011. Cooperative Parallelization. Proceedings of the IEEE/ACM 2011 International Conference on Computer-Aided Design (ICCAD 2011). pp. 131-141. San Jose, CA.
      • Kandemir, M., S. Srikantaiah, S. W. Son. November 2011. Improving Shared Cache Behavior of Multithreaded Object-oriented Applications in Multicores. Proceedings of the IEEE/ACM 2011 International Conference on Computer-Aided Design (ICCAD 2011). pp. 118-125. San Jose, CA.
      • Zhao, H., A. Sharifi, S. Srikantaiah, M. Kandemir. November 2011. Feedback Control Based Cache Reliability Enhancement for Emerging Multicores. Proceedings of the IEEE/ACM 2011 International Conference on Computer-Aided Design (ICCAD 2011). pp. 56-62. San Jose, CA.
      • Ding, W., J. Srinivas, M. Kandemir, M. Karakoy. October 2011. Compiler Directed Data Locality Optimization for Multicore Architectures. Proceedings of International Conference on Parallel Architectures and Compilation Techniques (PACT 2011). pp. 171-172. Galveston Island, TX. (16% acceptance rate)
      • Zhang, Y., W. Ding, J. Liu, M. Kandemir. October 2011. Optimizing Data Layouts for Parallel Computation on Multicores. Proceedings of International Conference on Parallel Architectures and Compilation Techniques (PACT 2011). pp. 143-154. Galveston Island, TX. (16% acceptance rate)
      • Muralidhara, S., M. Kandemir, Y. Zhang. August 29-September 2, 2011. Bandwidth Constrained Coordinated HW/SW Prefetching for Multicores. Proceedings of Euro-Par 2011. pp. 310-325. Bordeaux, France.
      • Kandemir, M., R. Prabhakar, M. Karakoy, Y. Zhang. August 29-September 2, 2011. Multilayer Cache Partitioning for Multiprogram Workloads. Proceedings of Euro-Par 2011. pp. 130-141. Bordeaux, France.
      • Swaminathan, K., E. Kultursay, V. Saripalli, N. Vijaykrishnan, M. Kandemir, S. Datta. August 2011. Improving Energy Efficiency of Multi-Threaded Applications using Heterogeneous CMOS-TFET Mutlicores. Proceedings of the International Symposium on Low Power Electronics and Design (ISLPED 2011). pp. 247-252. Fukuoka, Japan.
      • Prabhakar, R., S. Vazhkudai, Y. Kim, A. R. Butt, M. Li, M. Kandemir. June 2011. Provisioning a Multi-Tiered Data Staging Area for Extreme-Scale Machines. Proceedings of the International Conference on Distributed Computing Systems (ICDCS 2011). Minneapolis, MN. pp. 1-12.
      • Zhang, Y., J. Liu, E. Wilson, M. Kandemir. June 2011. Software-Directed Data Access Scheduling for Reducing Disk Energy Consumption. Proceedings of the Twentieth International ACM Symposium on High-Performance Parallel and Distributed Computing (HPDC 2011). pp. 281-282. San Jose, CA.
      • Zhang, Y., M. Kandemir, T. Yemliha. June 2011. Studying Inter-Core Data Reuse in Multicores. Proceedings of the International Conference on Measurement and Modeling of Computer Systems (SIGMETRICS 2011). pp. 25-36. San Jose, CA.
      • Sharifi, A., S. Srikantaiah, A. Mishra, M. Kandemir, C. R. Das. June 2011. METE: Meeting End-to-End QoS in Multicores through System-Wide Resource Management. Proceedings of the International Conference on Measurement and Modeling of Computer Systems (SIGMETRICS 2011). pp. 13-24. San Jose, CA.
      • Kandemir, M. T. Yemliha, E. Kultursay. June 2011. A Helper Thread Based Dynamic Cache Partitioning Scheme for Multithreaded Applications. Proceedings of the Forty-Eighth Design Automation Conference (DAC 2011). pp. 954-959. San Diego, CA.
      • Sharifi, A., M. Kandemir. June 2011. Process Variation-Aware Routing in NoC Based Multicores. Proceedings of the Forty-Eighth Design Automation Conference (DAC 2011). pp. 924-929. San Diego, CA.
      • Prabhakar, R., S. Srikantaiah, R. Garg, M. Kandemir. May 2011. Adaptive QoS Decomposition and Control for Storage Cache Management in Multi-Server Environments. Proceedings of the Eleventh IEEE/ACM International Symposium on Cluster, Cloud and Grid Computing (CCGrid 2011). pp. 402-413. Newport Beach, CA.
      • Patrick, C., N. Voshell, M. Kandemir. May 2011. APP: Minimizing Interference Using Aggressive Pipelined Prefetching in Multi-Level Buffer Caches. Proceedings of the Eleventh IEEE/ACM International Symposium on Cluster, Cloud and Grid Computing (CCGrid 2011). pp. 254-264. Newport Beach, CA.
      • Patrick, C., N. Voshell, M. Kandemir. April 2011. Minimizing Interference Through Application Mapping in Multi-Level Buffer Caches. Proceedings of the 2011 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS 2011). pp. 44-55. Austin, TX.
      • Kandemir, M., Y. Zhang, J. Liu, T. Yemliha. April 2011. Neighborhood-Aware Data Locality Optimization for NoC-Based Multicores. Proceedings of the International Symposium on Code Generation and Optimization (CGO 2011). pp. 191-200. Chamonix, France.
      • Liu, J., Y. Zhang, W. Ding, M. Kandemir. April 2011. On-Chip Cache Hierarchy-Aware Tile Scheduling for Multicore Machines. Proceedings of the International Symposium on Code Generation and Optimization (CGO 2011). pp. 161-170. Chamonix, France.
      • Zhao, H., M. Kandemir, M. J. Irwin. March 2011. Exploring Performance-Power Tradeoffs in Providing Reliability for NoC-Based MPSoCs. Proceedings of the International Symposium on Quality Electronic Design (ISQED 2011). pp. 495-501. Santa Clara, CA.
      • Srikantaiah, S., E. Kultursay, T. Zhang, M. Kandemir, M. J. Irwin, Y. Xie. February 2011. MorphCache: A Reconfigurable Adaptive Multi-level Cache Hierarchy. Proceedings of the Seventeenth IEEE International Symposium on High Performance Computer Architecture (HPCA-17). pp. 231-242. San Antonio, TX.
      • Prabhakar, R. S. Srikantaiah, R. Garg, M. Kandemir. February 2011. QoS Aware Storage Cache Management in Multi-Server Environments. Proceedings of the Sixteenth ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming (PPOPP 2011). pp. 289-290. San Antonio, TX.
      • Sharifi, A., M. Kandemir. February 2011. Automatic Feedback Control of Shared Hybrid Caches in 3D Chip Multiprocessors. Proceedings of the Nineteenth Euromicro International Conference on Parallel, Distributed and Network-Based Computing (PDP 2011). pp. 393-400. Ayia, Cyprus.
      • Oz, I. H. Topcuoglu, M. Kandemir, O. Tosun. February 2011. Quantifying Thread Vulnerability for Multicore Architectures. Proceedings of the Nineteenth Euromicro International Conference on Parallel, Distributed and Network-Based Computing (PDP 2011). pp. 32-39. Ayia, Cyprus.
      • Srikantaiah, S., M. Kandemir. December 2010. Synergistic TLBs for High Performance Address Translation in Chip Multiprocessors. Proceedings of the Forty-Third Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-43). pp. 313-324. Atlanta, GA.
      • Mishra, A., S. Srikantaiah, M. Kandemir, C. R. Das. November 2010. CPM in CMPs: Coordinated Power Management in Chip-Multiprocessors. Proceedings of the Conference on High Performance Computing Networking, Storage and Analysis (SC 2010). 12 pages. New Orleans, LA.
      • Kim, S., Y. Zhang, S. W. Son, R. Prabhakar, M. Kandemir, C. Patrick, W-K. Liao, A. Choudhary. September 2010. Automated Tracing of I/O Stack. Proceedings of the Seventeenth EuroMPI Conference. Springer-Verlag LNCS 6305:72-81. Stuttgart, Germany.
      • Yemliha, T., M. Kandemir, O. Ozturk, E. Kultursay, S. Muralidhara. August 31-September 3, 2010. Code Scheduling for Optimizing Parallelism and Data Locality. Proceedings of the Sixteenth European Conference on Parallel and Distributed Computing (Euro-Par 2010). Springer-Verlag LNCS 6272:204-216. Naples, Italy.
      • Zhang, Y., J. Liu, E. Kultursay, M. Kandemir, N. Pitsianis, X. Sun. August 31-September 3, 2010. Scalable Parallelization Strategies to Accelerate NuFFT Data Translation on Multicores. Proceedings of the Sixteenth European Conference on Parallel and Distributed Computing (Euro-Par 2010). Springer-Verlag LNCS 6272:125-136. Naples, Italy.
      • Patrick, C., M. Kandemir, M. Karakoy, S. W. Son, A. Choudhary. June 2010. Cashing in on Hints for Better Prefetching and Caching in PVFS and MPI-IO. Proceedings of the ACM International Symposium on High Performance Distributed Computing (HPDC 2010). pp. 191-202. Chicago, IL.
      • Kandemir, M., S. Muralidhara, M. Karakoy, S. W. Son, A. Choudhary. June 2010. Computation Mapping for Multi-Level Storage Cache Hierarchies. Proceedings of the ACM International Symposium on High Performance Distributed Computing (HPDC 2010). pp. 179-190. Chicago, IL.
      • Mishra, A., S. Srikantiah, M. Kandemir, C. R. Das. June 2010. Coordinated Power Management of Voltage Islands in CMPs. Proceedings of the International Conference on Measurement and Modeling of Computer Systems (SIGMETRICS 2010). pp. 359-360. New York, NY. (Poster)
      • Kandemir, M., T. Yemliha, S. Muralidhara, S. Srikantaiah, M. J. Irwin, Y. Zhang. June 2010. Cache Topology Aware Computation Mapping for Multicores. Proceedings of the ACM SIGPLAN 2010 Conference on Programming Language Design and Implementation (PLDI 2010). pp. 74-85. Toronoto, Canada.
      • Prabhakar, R., S. Srikantaiah, M. Kandemir, C. Patrick. June 2010. Adaptive Multi-level Cache Allocation in Distributed Storage Architectures. Proceedings of the Twenty-Fourth International Conference on Supercomputing (ICS ’10). pp. 211-221. Tsukuba, Japan.
      • Muralidhara, S. P., M. Kandemir, P. Raghavan. April 2010. Intra-Application Cache Partitioning. Proceedings of the Twenty-Fourth IEEE/ACM International Parallel and Distributed Symposium (IPDPS 2010). Proceedings of CD-ROM. 12 pages. Atlanta, GA.
      • Malkowski, K., P. Raghavan, M. Kandemir. April 2010. Analyzing the Soft-Error Resilience of Linear Solvers on Multicore Multiprocessors. Proceedings of the Twenty-Fourth IEEE/ACM International Parallel and Distributed Symposium (IPDPS 2010). Proceedings on CD-ROM. 12 pages. Atlanta, GA.
      • Malkowski, K., P. Raghavan, M. Kandemir, M. J. Irwin. April 2010. T-NUCA - A Novel Approach to Non-Uniform Access Latency Cache Architectures for 3D CMPs. Proceedings of the Sixth Workshop on High-Performance, Power-Aware Computing (HPPAC 2010), in conjunction with IPDPS 2010. Proceedings on CD-ROM. 8 pages. Atlanta, GA.
      • Ding, Y., M. Kandemir, M. J. Irwin, P. Raghavan. April 2010. Dynamic Core Partitioning for Energy Efficiency. Proceedings of the Workshop on High-Performance, Power-Aware Computing (HPPAC 2010), in conjunction with IPDPS 2010. Proceedings on CD-ROM. 8 pages. Atlanta, GA.
      • Kandemir, M., O. Ozturk, S. Narayanan, M. J. Irwin. April 2010. Compiler Directed Network-on-Chip Reliability Enhancement for Chip Multiprocessors. Proceedings of the ACM SIGPLAN/SIGBED Conference on Languages, Compilers and Tools for Embedded Systems (LCTES 2010). pp. 85-94. Stockholm, Sweden.
      • Sharifi, A., H. Zhao, M. Kandemir. March 2010. Feedback Control for Providing QoS in NoC Based Multicores. Proceedings of the Design, Automation, and Test in Europe (DATE 2010). pp. 1384-1389. Dresden, Germany.
      • Zhang, Y., L. Deng, P. Yedlapalli, S. Muralidhara, H. Zhao, M. Kandemir, C. Chakrabarti, N. Pitsianis, X. Sun. March 2010. A Special-Purpose Compiler for Look-Up Table and Code Generation for Function Evaluation. Proceedings of the Design, Automation, and Test in Europe (DATE 2010). pp. 1130-1135. Dresden, Germany.
      • Srikantaiah, S., M. Kandemir. January 2010. SRP: Symbiotic Resource Partitioning of the Memory Hierarchy in CMPs. Proceedings of the International Conference on High-Performance Embedded Architectures and Compilers (HiPEAC 2010). pp. 277-291. Pisa, Italy.
      • Muralidhara, S., M. Kandemir, P. Raghavan. January 2010. Intra-Application Shared Cache Partitioning for Multithreaded Applications. Proceedings of the Fifteenth ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming (PPoPP 2010). pp. 329-330. Bangalore, India. (Poster)
      • Srikantaiah, S., M. Kandemir, Q. Wang. December 2009. SHARP Control: Controlled Shared Cache Management in Chip Multiprocessors. Proceedings of the Forty-Second International Symposium on Microarchitecture (MICRO-42). pp. 517-528. New York, NY.
      • Kandemir, M., S. Muralidhara, S. H. K. Narayanan, Y. Zhang, O. Ozturk. December 2009. Optimizing Shared Cache Behavior of Chip Multiprocessor. Proceedings of the Forty-Second International Symposium on Microarchitecture (MICRO-42). pp. 505-516. New York, NY.
      • Srikantaiah, S., R. Das, A. Mishra, M. Kandemir, C. R. Das. November 2009. A Case for Integrated Processor-Cache Partitioning in Chip Multiprocessors. Proceedings of the International Conference for High Performance Computing, Networking, Storage and Analysis (SC’09). Portland, OR.
      • Prabhakar, R., S. Srikantaiah, C. Patrick, M. Kandemir. November 2009. Dynamic Storage Cache Allocation in Multi-server Architectures. Proceedings of the International Conference for High Performance Computing, Networking, Storage and Analysis (SC’09). Portland, OR.
      • Akioka, S., F. Li, K. Malkowski, P. Raghavan, M. Kandemir, M. J. Irwin. October 2009. Ring Data Location Prediction Scheme for Non-Uniform Cache Architectures. Proceedings of the IEEE International Conference on Computer Design (ICCD 2009). pp. 693-698. Lake Tahoe, CA.
      • Zhang, Y., M. Kandemir, N. P. Pitsianis, X. Sun. October 2009. Exploring Parallelization Strategies for NUFFT Data Translation. Proceedings of the Seventh ACM International Conference on Embedded Software (EMSOFT 2009). pp. 187-196. Grenoble, France.
      • Kandemir, M., Y. Zhang, S. Muralidhara, O. Ozturk, S. H. K. Narayanan. October 2009. Slicing Based Code Parallelization for Minimizing Inter-processor Communication. Proceedings of the 2009 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES 2009). pp. 87-96. Grenoble, France.
      • Garg, R., R. Prabhakar, M. Kandemir. September 2009. Power Aware Disk Allocation. Proceedings of the ISCA Twenty-Second International Conference on Parallel and Distributed Computing and Communication Systems (PDCCS 2009). pp. 205-212. Louisville, KY.
      • Garg, R., C. Patrick, M. Kandemir. September 2009. Dynamic Storage Cache Partitioning Using Feedback Control Theory. Proceedings of the ISCA Twenty-Second International Conference on Parallel and Distributed Computing and Communication Systems (PDCCS 2009). pp. 157-164. Louisville, KY.
      • Son, S. W., M. Kandemir, Y. Zhang, R. Garg. September 2009. Topology-aware I/O Caching for Shared Storage Systems. Proceedings of the ISCA Twenty-Second International Conference on Parallel and Distributed Computing and Communication Systems (PDCCS 2009). pp. 143-150. Louisville, KY. (Best Paper Award)
      • Zhang, Y., M. Kandemir. September 2009. Automated Parallelization of Non-uniform Convolutions on Chip Multiprocessor. Proceedings of the Thirteenth Annual High Performance Embedded Computing Workshop (HPEC 2009). 4 pages. Lexington, MA.
      • Patrick, C., R. Garg, S. W. Son, M. Kandemir. August 31-September 4, 2009. Improving I/O Performance Using Soft-QoS Based Dynamic Storage Cache Partitioning. Proceedings of the 2009 IEEE International Conference on Cluster Computing (Cluster 2009). 10 pages. New Orleans, LA.
      • Shantharam, M., P. Raghavan, M. Kandemir. August 2009. Hybrid Techniques for Fast Multicore Simulation. Proceedings of the International Conference on Parallel and Distributed Computing (Euro-Par'09). Springer-Verlag LNCS, 5704:122-134. Delft, The Netherlands.
      • Prins, R., M. Kandemir. August 2009. Cooperative MCM for Heterogeneous Vehicles Optimized Under Constrained Time. Proceedings of the International Symposium on Unmanned Untethered Submersible Technology (UUST). (Awaiting page numbers). Durham, NH.
      • Kandemir, M., S. Srikantaiah, G. Giger, J. Dzielski. August 2009. Automated Mission Code Translation Across Different UMV Types. Proceedings of AUVSI's Unmanned Systems in North America 2009. Proceedings on CD-ROM. 10 pages. Washington, D.C.
      • Prins, R., M. Kandemir. August 2009. Communication Strategies in Multi-AUV Cooperative MCM Reconnaissance. Proceedings of AUVSI's Unmanned Systems in North America 2009. Proceedings on CD-ROM. Washington, D.C.
      • Zhang, Y., M. Kandemir. July 2009. A Hardware-Software Codesign Strategy for Loop Intensive Applications. Proceedings of the Seventh IEEE Symposium on Application Specific Processors (SASP 2009), in conjunction with DAC 2009. pp. 107-113. San Francisco, CA.
      • Prabhakar, R., C. Patrick, M. Kandemir. May 2009. MPISec I/O: Providing Data Confidentiality in MPI-I/O. Proceedings of the Ninth IEEE International Symposium on Cluster Computing and the Grid (CCGRID 2009). pp. 388-395. Shanghai, China.
      • Garg, R., S. W. Son, M. Kandemir, P. Raghavan, R. Prabhakar. May 2009. Markov Model Based Prediction for Disk Power Management in Data Intensive Workloads. Proceedings of the Ninth IEEE International Symposium on Cluster Computing and the Grid (CCGRID 2009). pp. 76-83. Shanghai, China.
      • Ozturk, O., M. Kandemir. April 2009. Using Dynamic Compilation for Continuing Execution Under Reduced Memory Availability. Proceedings of the Design Automation & Test in Europe (DATE 2009). pp. 1373-1378. Nice, France.
      • Hong, S., S. H. K. Narayanan, M. Kandemir. April 2009. Process Variation Aware Thread Mapping for Chip Multiprocessors. Proceedings of the Design Automation & Test in Europe (DATE 2009). pp. 821-826. Nice, France.
      • Kandemir, M., Y. Zhang, O. Ozturk. April 2009. Adaptive Prefetching for Shared Cache Based Chip Multiprocessors. Proceedings of the Design Automation & Test in Europe (DATE 2009). pp. 773-778. Nice, France.
      • Son, S. W., M. Kandemir, M. Karakoy, D. Chakrabarti. February 2009. A Compiler-directed Data Prefetching Scheme for Chip Multiprocessors. Proceedings of the Fourteenth ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming (PPoPP 2009). pp. 209-218. Raleigh, NC.
      • Yanamandra, A., M. J. Irwin, N. Vijaykrishnan, M. Kandemir, S. H. K. Narayanan. January 2009. In-Network Caching for Chip Multiprocessors. Proceedings of the Fourth International Conference on High Performance Embedded Architectures and Compilers (HiPEAC 2009). Springer-Verlag LNCS 5409:373-388. Paphos, Cyprus.
      • Ding, Y., M. Kandemir, M. J. Irwin, P. Raghavan. January 2009. Adapting Application Mapping to Systematic Within-Die Process Variations on Chip Multiprocessors. Proceedings of the Fourth International Conference on High Performance Embedded Architectures and Compilers (HiPEAC 2009). Springer-Verlag LNCS 5409:231-247. Paphos, Cyprus.
      • Muralidhara, S. P., M. Kandemir. January 2009. Communication Based Proactive Link Power Management. Proceedings of the Fourth International Conference on High Performance Embedded Architectures and Compilers (HiPEAC 2009). Springer-Verlag LNCS 5409:198-215. Paphos, Cyprus.
      • Ozturk, O., S. W. Son, M. Kandemir, M. Karakoy. November 2008. Prefetch Throttling and Data Pinning for Improving Performance of Shared Caches. Proceedings of the International Conference for High Performance Computing, Networking, Storage and Analysis (SC’08). 12 pages. Austin, TX. (21% acceptance rate)
      • Kandemir, M., F. Li, M. J. Irwin, S. W. Son. November 2008. A Novel Migration-based NUCA Design for Chip Multiprocessors. Proceedings of the International Conference for High Performance Computing, Networking, Storage and Analysis (SC’08). 12 pages. Austin, TX. (21% acceptance rate)
      • Yemliha, T., S. Srikantaiah, M. Kandemir, M. Karakoy, M. J. Irwin. November 2008. Integrated Code and Data Placement in Two-Dimensional Mesh Based Chip Multiprocessors. Proceedings of the ACM/IEEE 2008 International Conference on Computer-Aided Design (ICCAD 2008). pp. 583-588. San Jose, CA. (27.2% acceptance rate)
      • Yemliha, T., S. Srikantaiah, M. Kandemir, O. Ozturk. November 2008. SPM Management Using Markov Chain Based Data Access Prediction. Proceedings of the ACM/IEEE 2008 International Conference on Computer-Aided Design (ICCAD 2008). pp. 565-569. San Jose, CA. (27.2% acceptance rate)
      • Son, S. W., P. Muralidhara, O. Ozturk, M. Kandemir, I. Kolcu, M. Karakoy. October 2008. Profiler and Compiler Assisted Adaptive I/O Prefetching for Shared Storage Caches. Proceedings of the Seventeenth International Conference on Parallel Architectures and Compilation Techniques (PACT’08). pp. 112-121. Toronto, Canada.
      • Prins, R., M. Kandemir. September 2008. Time-Constrained Optimization of Multi-AUV Cooperative Mine Detection. Proceedings of Oceans, Poles, and Climate: Technological Challenges (OCEANS 2008). 13 pages. Quebec City, Quebec, Canada.
      • Giger, G., M. Kandemir, J. Dzielski. September 2008. A Graphical Mission Planning Tool for Use in Mine Counter Measure (MCM) Operations. Proceedings of Oceans, Poles, and Climate: Technological Challenges (OCEANS 2008). 11 pages. Quebec City, Quebec, Canada.
      • Sustersic, J., M. Kandemir, S. Phoha, M. Schmiedekamp. September 2008. High-Performance Visualizations and Simulations for Ocean Environments and the Mind Countermeasure Mission Using C3L. Proceedings of Oceans, Poles, and Climate: Technological Challenges (OCEANS 2008). (Awaiting page numbers). Quebec City, Quebec, Canada.
      • Narayanan, S. H. K., M. Kandemir. June 2008. A Systematic Approach to Automatically Generate Multiple Semantically Equivalent Program Versions. Proceedings of the Thirteenth International Conference on Reliable Software Technologies (ADA-Europe 2008). pp. 185-198. Venice, Italy.
      • Chen, G., F. Li, S. W. Son, M. Kandemir. June 2008. Application Mapping for Chip Multiprocessors. Proceedings of the Forty-Fifth ACM/IEEE Design Automation Conference (DAC 2008). pp. 620-625. Anaheim, CA.
      • Li, F., M. Kandemir, M. J. Irwin. June 2008. Implementation and Evaluation of a Migration-based NUCA Design for Chip Multiprocessors. Proceedings of the International Conference on Measurement and Modeling of Computer Systems (SIGMETRICS 2008). pp. 449-450. Annapolis, MD. (18% acceptance rate)
      • Ding, Y., M. Kandemir, P. Raghavan, M. J. Irwin. April 2008. A Helper Thread Based EDP Reduction Scheme for Adapting Application Execution in CMPs. Proceedings of the Twenty-Second IEEE International Parallel and Distributed Processing Symposium (IPDPS 2008). Proceedings on CD-ROM. 14 pages. Miami, FL. (Best Paper, Software Track; 4 Best Papers, 1 per track out of 410 papers received) (25% acceptance rate)
      • Yanamandra, A., B. Cover, P. Raghavan, M. J. Irwin, M. Kandemir. April 2008. Evaluating the Role of Scratchpad Memories in Chip Multiprocessors for Sparse Matrix Computations. Proceedings of the Twenty-Second IEEE International Parallel and Distributed Processing Symposium (IPDPS 2008). Proceedings on CD-ROM. 10 pages. Miami, FL. (25% acceptance rate)
      • Raghavan, P., M. Kandemir, M. J. Irwin, K. Malkowski. April 2008. Managing Power, Performance and Reliability Trade-offs. Proceedings of the Next Generation Software (NGS) Workshop, in conjunctions with IPDPS 2008. Proceedings on CD-ROM. 5 pages. Miami, FL.
      • Son, S. W., M. Kandemir, M. Karakoy. April 2008. Improving I/O Performance through Compiler-Directed Code Restructuring and Adaptive Prefetching. Proceedings of the Next Generation Software (NGS) Workshop, in conjunctions with IPDPS 2008. Proceedings on CD-ROM. 5 pages. Miami, FL.
      • Ding, Y., K. Malkowski, P. Raghavan, M. Kandemir. April 2008. Towards Energy Efficient Scaling of Scientific Codes. Proceedings of the Fourth Workshop on High-Performance, Power-Aware Computing (HPPAC) Workshop, in conjunction with IPDPS 2008. Proceedings on CD-ROM. 8 pages. Miami, FL.
      • Ozturk, O., M. Kandemir, S. H. K. Narayanan. March 2008. A Scratch-Pad memory Aware Dynamic Loop Scheduling Algorithm. Proceedings of the Ninth International Symposium on Quality Electronic Design (ISQED 2008). pp. 738-743. San Jose, CA.
      • Srikantaiah, S., M. Kandemir, M. J. Irwin. March 2008. Adaptive Set-Pinning: Managing Shared Caches in Chip Multiprocessors. Proceedings of the Thirteenth International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS 2008). pp. 135-144. Seattle, WA. (24% acceptance rate)
      • Kandemir, M., S. W. Son. February 2008. Improving I/O Performance of Applications through Compiler-Directed Code Restructuring. Proceedings of the Sixth USENIX Conference on File and Storage Technologies (FAST’08). pp. 159-174. San Jose, CA. (20% acceptance rate)
      • Patrick, C., S. W. Son, M. Kandemir. February 2008. Enhancing the Performance of MPI-IO Applications by Overlapping I/O, Computation and Communication. Proceedings of the Thirteenth ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming (PPoPP 2008). pp. 277-278. Salt Lake City, UT. (Poster)
      • Patrick, C., S. W. Son, M. Kandemir. February 2008. Comparative Evaluation of Overlap Strategies with Study of I/O Overlap in MPI-IO. Proceedings of the First International Workshop on Storage and I/O Virtualization, Performance, Energy, Evaluation and Dependability (SPEED 2008), in conjunction with HPCA 2008. pp. 1-6. Salt Lake City, UT.
      • Akioka, S., F. Li, M. Kandemir, P. Raghavan, M. J. Irwin. September 2007. Ring Prediction for Non-Uniform Cache Architectures. Proceedings of the Sixteenth International Conference on Parallel Architecture and Compilation Techniques (PACT 2007). p. 401. Brasov, Romania.
      • Ozturk, O., M. Kandemir, S. W. Son. August 2007. An ILP Based Approach to Reducing Energy Consumption in NOC Based CMPS. Proceedings of the International Symposium on Low Power Electronics and Design (ISLPED 2007). pp. 411-414. Portland, OR. (Poster presentation)
      • Malkowski, K., P. Raghavan, M. Kandemir, M. J. Irwin. August 2007. Phase-aware Adaptive Hardware Selection for Power-Efficient Scientific Computations. Proceedings of the International Symposium on Low Power Electronics and Design (ISLPED 2007). pp. 403-406. Portland, OR. (Poster presentation)
      • Son, S. W., M. Kandemir. August 2007. Improving Disk Reuse for Reducing Power Consumption. Proceedings of the International Symposium on Low Power Electronics and Design (ISLPED 2007). pp. 129-134. Portland, OR.
      • Kim, J., P. Mangalagiri, K. Irick, M. Kandemir, N. Vijaykrishnan, K. Sobti, L. Deng, C. Chakrabarti, N. Pitsianis, X. Sun. August 2007. TANOR: A Tool for Accelerating N-Body Simulations on Reconfigurable Platform. Proceedings of the Seventeenth International Conference on Field Programmable Logic and Applications (FPL 2007). pp. 68-73. Amsterdam, Netherlands.
      • Giger, G., M. Kandemir, S. D. Lovell, J. Dzielski. August 2007. Automated Mission Parallelization for a Group of UUV's. Proceedings of the International Symposium on Unmanned Untethered Submersible Technology (UUST). 13 pages. Durham, NH.
      • Kadayif, I., M. Kandemir. June 2007. Modeling and Improving Data Cache Reliability. Proceedings of the International Conference on Measurement and Modeling of Computer Systems (SIGMETRICS). pp. 1-12. San Diego, CA. (17% acceptance rate)
      • Li, F., G. Chen, M. Kandemir, I. Kolcu. June 2007. Profile-Driven Energy Reduction in Network-on-Chips. Proceedings of the ACM SIGPLAN 2007 Conference on Programming Language Design and Implementation (PLDI 2007). pp. 394-404. San Diego, CA. (24% acceptance rate)
      • Xue, L., O. Ozturk, M. Kandemir. June 2007. A Memory-Conscious Code Parallelization Scheme. Proceedings of the Forty-Fourth Design Automation Conference (DAC 2007). pp. 230-233. San Diego, CA. (23% acceptance rate)
      • Koc, H., M. Kandemir, E. Ercanli, O. Ozturk. June 2007. Reducing Off-Chip Memory Access Costs Using Data Recomputation in Embedded Chip Multi-processors. Proceedings of the Forty-Fourth Design Automation Conference (DAC 2007). pp. 224-229. San Diego, CA. (23% acceptance rate)
      • Son, S. W., M. Kandemir. May 2007. Integrated Data Reorganization and Disk Mapping for Reducing Disk Energy Consumption. Proceedings of the Seventh IEEE International Symposium on Cluster Computing and the Grid (CCGrid 2007). pp. 557-564. Rio de Janeiro, Brazil.
      • Narayanan, S. H. K., M. Kandemir, R. Brooks. April 2007. Performance-aware Secure Code Partitioning. Proceedings of the Design, Automation and Test in Europe (DATE'07). pp. 1122-1127. Nice, France.
      • Kandemir, M., T. Yemliha, S. W. Son, O. Ozturk. April 2007. Memory Bank Aware Dynamic Loop Scheduling. Proceedings of the Design, Automation and Test in Europe (DATE'07). pp. 1671-1676. Nice, France.
      • Koc, H., E. Ecanli, M. Kandemir, O. Ozturk. March 2007. An ILP Formation for Recomputation Based SPM Management for Embedded CMPs. Proceedings of the Fifth Workshop on Optimizations for DSP and Embedded Systems (ODES 2007), in conjunction with CGO'07. pp. 21-28. San Jose, CA.
      • Ozturk, O., G. Chen, M. Kandemir. March 2007. Compiler-directed Variable Latency Aware SPM Management to Cope with Timing Problems. Proceedings of the IEEE/ACM International Symposium on Code Generation and Optimization (CGO'07). pp. 232-243. San Jose, CA. (32% acceptance rate)
      • Ding, Y., M. Kandemir, P. Raghavan, M. J. Irwin. February 2007. Adapting Application Execution to Reduced CPU Availability. Proceedings of the Eleventh Annual Workshop on the Interaction Between Compilers and Computer Architecture (Interact-11). pp. 24-31. Phoenix, AZ.
      • Xue, L., M. Kandemir, G. Chen, F. Li, O. Ozturk, R. Ramanarayanan, B. Vaidyanathan. January 2007. Locality-aware Distributed Loop Scheduling for Chip Multiprocessors. Proceedings of the Twentieth International Conference on VLSI Design (VLSI'07). pp. 251-258. Bangalore, India.
      • Kandemir, M., O. Ozturk, V. S. Degalahal. January 2007. Enhancing Locality in Two-dimensional Space through Integrated Computation and Data Mappings. Proceedings of the Twentieth International Conference on VLSI Design (VLSI'07). pp. 227-232. Bangalore, India.
      • Yemliha, T., G. Chen, O. Ozturk, M. Kandemir, V. S. Degalahal. January 2007. Compiler-directed Code Restructuring for Operating with Compressed Arrays. Proceedings of the Twentieth International Conference on VLSI Design (VLSI'07). pp. 221-226. Bangalore, India.
      • Li, F., G. Chen, M. Kandemir, O. Ozturk, M. Karakoy, R. Ramanarayanan, B. Vaidyanathan. January 2007. A Process Scheduler-based Approach to NoC Power Management. Proceedings of the Twentieth International Conference on VLSI Design (VLSI'07). pp. 77-82. Bangalore, India.
      • Ozturk, O., G. Chen, G. Chen, M. Kandemir, M. Karakoy. November 2006. Cache Miss Clustering for Banked Memory Systems. Proceedings of the IEEE/ACM 2006 International Conference on Computer-Aided Design (ICCAD 2006). pp. 244-250. San Jose, CA. (25% acceptance rate)
      • Koc, H., O. Ozturk, M. Kandemir, S. H. K. Narayanan, E. Ercanli. October 2006. Minimizing Energy Consumption of Banked Memories Using Data Recomputation. Proceedings of the International Symposium on Low Power Electronics and Design (ISLPED 2006). pp. 358-362. Tegernsee, Germany. (26% acceptance rate)
      • Kandemir, M., S.-W. Son. October 2006. Reducing Power Through Compiler-directed Barrier Synchronization Elimination. Proceedings of the International Symposium on Low Power Electronics and Design (ISLPED 2006). pp. 354-357. Tegernsee, Germany. (26% acceptance rate)
      • Chen, G., M. Kandemir, M. Karakoy. September 2006. Compiler Support for Voltage Islands. Proceedings of the IEEE International System on Chip Conference (SOCC 2006). pp. 189-192. Austin, TX.
      • Chen, G, L. Xue, J. Kim, K. Sobti, L. Deng, X. Sun, N. Pitsianis, C. Chakrabarti, M. Kandemir, N. Vijaykrishnan. September 2006. Using Geometric Tiling for Reducing Power Consumption in Structured Matrix Operations. Proceedings of the IEEE International System on Chip Conference (SOCC 2006). pp. 113-114. Austin, TX.
      • Chen, G., O. Ozturk, G. Chen, M. Kandemir. September 2006. Energy-Aware Code Replication for Improving Reliability in Embedded Chip Multiprocessors. Proceedings of the IEEE International System on Chip Conference (SOCC 2006). pp. 77-78. Austin, TX.
      • Giger, G., L. Xue, S. Tangirala, M. Kandemir. August 2006. High Level Programming Support for Unmanned Underwater Vehicles. Proceedings of AUVSI's Unmanned Systems in North America 2006. Proceedings on CD-ROM. 10 pages. Washington, D.C.
      • Ozturk, O., G. Chen, M. Kandemir. July 2006. A Constraint Network Based Solution to Code Parallelization. Proceedings of the Forty-Third Design Automation Conference (DAC'06). pp. 863-869. San Francisco, CA.
      • Xue, L, M. Kandemir, G. Chen, T. Yemliha. July 2006. SPM-conscious Loop Scheduling for Embedded Chip Multiprocessors. Proceedings of the Twelfth International Conference on Parallel and Distributed Systems (ICPADS'06). pp. 391-400. Minneapolis, MN.
      • Ozturk, O., M. Kandemir, M. J. Irwin, S. Tosun. July 2006. Multi-level On-chip Memory Hierarchy Design for Embedded Chip Multiprocessors. Proceedings of the Twelfth International Conference on Parallel and Distributed Systems (ICPADS'06). pp. 383-390. Minneapolis, MN.
      • Tosun, S., M. Kandemir, H. Koc. June 26-29, 2006. Using Task Recomputation During Application Mapping in Parallel Embedded Architectures. Proceedings of the 2006 International Conference on Computer Design (CDES'06). pp. 29-35. Las Vegas, NV.
      • Chen, G., M. Kandemir, I. Kolcu. June 25-28, 2006. Memory-conscious Reliable Execution on Embedded Chip Multiprocessors. Proceedings of the International Conference on Dependable Systems and Networks (DSN-2006). pp. 13-22. Philadelphia, PA. (18% acceptance rate)
      • Li, F., C. Nicopoulos, T. Richardson, Y. Xie, N. Vijaykrishnan, M. Kandemir. June 2006. Design and Management of 3D Chip Multiprocessors using Network-in-memory. Proceedings of the Thirty-Third Annual International Symposium on Computer Architecture (ISCA'06). pp. 130-141. Boston, MA.
      • Mutyam, M., F. Li, N. Vijaykrishnan, M. Kandemir, M.J. Irwin. June 2006. Compiler-Directed Thermal Management for VLIW Functional Units. Proceedings of the ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES 2006). pp. 163-172. Ottawa, Canada.
      • Chen, G., F. Li, M. Kandemir, M. J. Irwin. June 2006. Reducing NoC Energy Consumption through Compiler-Directed Channel Voltage Scaling. Proceedings ACM SIGPLAN 2006 Conference on Programming Language Design and Implementation (PLDI'06). pp. 193-203. Ottawa, Canada. (20% acceptance rate)
      • Narayanan, S.K., M. Kandemir, R. Brooks, I. Kolcu. June 2006. Secure Execution of Computations on Untrusted Hosts. Proceedings of the Eleventh International Conference on Reliable Software Technologies (Ada-Europe 2006). pp. 106-118. Porto, Portugal.
      • Ozturk, O., G. Chen, M. Kandemir. May 2006. Multi-compilation: Capturing Interactions Among Concurrently-executing Applications. Proceedings of the ACM International Conference on Computing Frontiers. pp. 157-170. Ischia, Italy.
      • Son, S. W., M. Kandemir. May 2006. Energy-aware Data Prefetching for Multi-speed Disks. Proceedings of the ACM International Conference on Computing Frontiers. pp. 105-114. Ischia, Italy.
      • Ozturk, O., M. Kandemir, M. Karakoy. April 30-May 2, 2006. Selective Code/data Migration for Reducing Communication Energy in Embedded MpSoC Architectures. ACM Great Lakes Symposium on VLSI (GLSVLSI 2006). pp. 386-391. Philadelphia, PA. (20% acceptance rate)
      • Ozturk, O., M. Kandemir, S. Tosun. April 30-May 2, 2006. An ILP Based Approach to Address Code Generation for Digital Signal Processors. ACM Great Lakes Symposium on VLSI (GLSVLSI 2006). pp. 37-42. Philadelphia, PA. (20% acceptance rate)
      • Liu, C., A. Sivasubramaniam, M. Kandemir, M. J. Irwin. April 2006. Enhancing L2 Organization for CMPs with a Center Cell. Proceedings of the Twentieth IEEE International Parallel and Distributed Processing Symposium (IPDPS'06). pp. 1-10. Rhodes Island, Greece.
      • Son, S. W., K. Malkowski, G. Chen, M. Kandemir, P. Raghavan. April 2006. Integrated Link/CPU Voltage Scaling for Reducing Energy Consumption of Parallel Sparse Matrix Applications. Proceedings of the Second Workshop on High-Performance, Power-Aware Computing (HP-PAC 2006). pp. 1-8. Rhodes Island, Greece.
      • Gayasen, A., N. Vijaykrishnan, M. Kandemir, A. Rahman. April 2006. Switch Box Architectures for Three-Dimensional FPGAs. Proceedings of the IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM). pp. 335-336. Napa Valley, CA.
      • Ozturk, O., M. Kandemir, I. Kolcu. March 2006. Shared Scratch-pad Memory Space Management. Proceedings of the Seventh International Symposium on Quality Electronic Design (ISQED 2006). pp. 576-584. San Jose, CA.
      • Narayanan, S., M. Kandemir, O. Ozturk. March 2006. Compiler-Directed Power Density Reduction in NoC-Based Multi-Core Designs. Proceedings of the Seventh International Symposium on Quality Electronic Design (ISQED 2006). pp. 570-575. San Jose, CA.
      • Ozturk, O., M. Kandemir. March 2006. Data Replication in Banked DRAMs for Reducing Energy Consumption. Proceedings of the Seventh International Symposium on Quality Electronic Design (ISQED 2006). pp. 551-556. San Jose, CA.
      • Ozturk, O., M, Kandemir, S. W. Son, I. Kolcu. March 2006. Managing SPM Space Based on Inter-application Data Sharing. Proceedings of the Fourth Workshop on Optimizations for DSP and Embedded Systems (ODES-4), in conjunction with CGO'06. pp. 21-30. Manhattan, NY.
      • Son, S. W., G. Chen, M. Kandemir. March 2006. A Compiler-guided Approach for Reducing Disk Power Consumption by Exploiting Disk Access Locality. Proceedings of the Fourth Annual Symposium on Code Generation and Optimization (GCO'06). pp. 256-268. Manhattan, NY.
      • Chen, G., O. Ozturk, M. Kandemir, M. Karakoy. March 2006. Dynamic Scratch-pad Memory Management for Irregular Array Access Patterns. Proceedings of the Design Automation and Test in Europe Conference (DATE 2006). pp. 931-936. Munich, Germany. (Top Download from ACM’s Digital Library)
      • Kandemir, M., G. Chen, F. Li, M. J. Irwin, I. Kolcu. March 2006. Activity Clustering for Leakage Management in SPMs. Proceedings of the Design Automation and Test in Europe Conference (DATE 2006). pp. 696-697. Munich, Germany.
      • Xue, L., O. Ozturk, F. Li, M. Kandemir, I. Kolcu. March 2006. Dynamic Partitioning of Processing and Memory Resources in Embedded MPSoC Architectures. Proceedings of the Design Automation and Test in Europe Conference (DATE 2006). pp. 690-695. Munich, Germany.
      • Chen, G., F. Li, M. Kandemir, I. Demirkiran. March 2006. Compiler-directed Management of Leakage Power in Software-managed Memories. Proceedings of the IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2006). pp. 450-451. Karlsruhe, Germany.
      • Koc, H., S. Tosun, O. Ozturk, M. Kandemir. March 2006. Reducing Memory Requirements through Task Recomputation in Embedded Multi-CPU Systems. Proceedings of the IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2006). pp. 448-449. Karlsruhe, Germany.
      • Chen, G., F. Li, O. Ozturk, G. Chen, M. Kandemir, I. Kolcu. March 2006. Leakage-aware SPM Management. Proceedings of the IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2006). pp. 393-398. Karlsruhe, Germany, March 2006.
      • Li, F., M. Kandemir. March 2006. Exploiting Software Pipelining for Network-on-chip Architectures. Proceedings of the IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2006). pp. 295-302. Karlsruhe, Germany.
      • Ozturk, O., G. Chen, M. Kandemir, M. Karakoy. March 2006. An Integer Linear Programming Based Approach to Simultaneous Memory Space Partitioning and Data Allocation for Chip Multiprocessors. Proceedings of the IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2006). pp. 50-58. Karlsruhe, Germany.
      • Unnikrishnan, P., M. Kandemir, F. Li. January 2006. Reducing Dynamic Compilation Overhead by Overlapping Compilation and Execution. Proceedings of the Eleventh Asia and South Pacific Design Automation Conference (ASP-DAC 2006). pp. 929-934. Yokohama City, Japan.
      • Ozturk, O., G. Chen, M. Kandemir, I. Kolcu. January 2006. Compiler-Guided Data Compression for Reducing Memory Consumption of Embedded Applications. Proceedings of the Eleventh Asia and South Pacific Design Automation Conference (ASP-DAC 2006). pp. 814-819. Yokohama City, Japan.
      • Kandemir, M., G. Chen, F. Li. January 2006. Maximizing Data Reuse for Minimizing Memory Space Requirements and Execution Cycles. Proceedings of the Eleventh Asia and South Pacific Design Automation Conference (ASP-DAC 2006). pp. 808-813. Yokohama City, Japan.
      • Ozturk, O., F. Wang, M. Kandemir, Y. Xie. January 2006. Optimal Topology Exploration for Application-specific 3D Architectures. Proceedings of the Eleventh Asia and South Pacific Design Automation Conference (ASP-DAC 2006). pp. 390-395. Yokohama City, Japan.
      • Kadayif, I., M. Kandemir, F. Li. January 2006. Prefetching-aware Cache Line Turnoff for Saving Leakage EnergEnergy. Proceedings of the Eleventh Asia and South Pacific Design Automation Conference (ASP-DAC 2006). pp. 182-187. Yokohama City, Japan.
      • Chen, G., G. Chen, M. Kandemir, N. Vijaykrishanan, M. J. Irwin. January 2006. Object Duplication for Improving Reliability. Proceedings of the Eleventh Asia and South Pacific Design Automation Conference (ASP-DAC 2006). pp. 140-145. Yokohama City, Japan. (31% acceptance rate)
      • Chen, G., M. Kandemir, F. Li. January 2006. Energy-Aware Computation Duplication for Improving Reliability in Embedded Chip Multiprocessors. Proceedings of the Eleventh Asia and South Pacific Design Automation Conference (ASP-DAC 2006). pp. 134-139. Yokohama City, Japan. (31% acceptance rate)
      • Son, S. W., G. Chen, M. Kandemir, F. Li. January 2006. Energy Savings through Embedded Processing on Disk System. Proceedings of the Eleventh Asia and South Pacific Design Automation Conference (ASP-DAC 2006). pp. 128-133. Yokohama City, Japan. (31% acceptance rate)
      • Chen, G., F. Li, M. Kandemir. January 2006. Compiler-Directed Channel Allocation for Saving Power in On-Chip Networks. Proceedings of the Thirty-Third Annual ACM-SIGACT Symposium on Principles of Programming Languages (POPL 2006). pp. 194-205. Charleston, SC. (20% acceptance rate)
      • Chen, G., M. Kandemir. November 2005. Runtime Integrity Checking for Inter-Object Connections. Proceedings of the International Conference on Computer Aided Design (ICCAD 2005). pp. 303-306. San Jose, CA. (23% acceptance rate)
      • Krishna Narayanan, S. H., G. Chen, M. Kandemir, Y. Xie. October 2005. Temperature-Sensitive Loop Parallelization for Chip Multiprocessors. Proceedings of the IEEE International Conference on Computer Design (ICCD 2005). pp. 677-682. San Jose, CA.
      • Pirretti, M., N. Vijaykrishnan, M. Kandemir, R. Brooks. October 2005. Realistic Models for Sensor Networks Using Key Predistribution Schemes. Proceedings of the Innovations and Commercial Applications of Distributed Sensor Networks Symposium (ICA DSN). Proceedings on CD-ROM. Bethedsa, MD.
      • Pirretti, M., S. Zhu, N. Vijaykrishnan, P. McDaniel, M. Kandemir, R. Brooks. October 2005. The Sleep Deprivation Attack in Sensor Networks: Analysis and Methods of Defense. Proceedings of the Innovations and Commercial Applications of Distributed Sensor Networks Symposium (ICA DSN 2005). Proceedings on CD-ROM. Washington, D.C. (Best paper award)
      • Chen, G., M. Kandemir. September 2005. Verifiable Annotations for Embedded Java Environments. Proceedings of the International Conference on Compilers, Architectures, and Synthesis of Embedded Systems (CASES '05). pp. 105-114. San Francisco, CA. (31% acceptance rate)
      • Ozturk, O., M. Kandemir, M. J. Irwin. September 2005. Increasing On-chip Memory Space Utilization for Embedded Chip Multiprocessors through Data Compression. Proceedings of the IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS'05). Jersey City, NJ. (25% acceptance rate)
      • Chen, G., M. Kandemir. September 2005. Optimizing Inter-processor Data Locality on Embedded Chip Multiprocessors. Proceedings of the Fifth International Conference on Embedded Software (EMSOFT'05). pp. 227-236. Jersey City, NJ. (28% acceptance rate)
      • Li, F., G. Chen, M. Kandemir, M. Karakoy. September 2005. Exploiting Last Idle Periods of Links for Network Power Management. Proceedings of the Fifth International Conference on Embedded Software (EMSOFT'05). pp. 134-137. Jersey City, NJ. (28% acceptance rate)
      • Ozturk, O., M. Kandemir, M. J. Irwin. September 2005. On-Chip Memory Management for Embedded MpSoC Architectures Based on Data Compression. Proceedings of the IEEE International SoC Conference (SOCC 2005). pp. 175-178. Washington, D.C.
      • Narayan, S. H. K., O. Ozturk, M. Kandemir, M. Karakoy. September 2005. Workload Clustering for Increasing Energy Savings on Embedded MPSoCs. Proceedings of the IEEE International SoC Conference (SOCC 2005). pp. 155-160. Washington, D.C.
      • Tosun, S., N. Mansouri, M. Kandemir. September 2005. Constraint-based Code Mapping for Heterogeneous Chip Multiprocessor. Proceedings of the IEEE International SoC Conference (SOCC 2005). pp. 89-90. Washington, D.C.
      • Chen, G., M. Kandemir, M. Karakoy. September 2005. Memory Space Conscious Loop Iteration Duplication for Reliable Execution. Proceedings of the Twelfth International Static Analysis Symposium (SAS'05). Springer-Verlag LNCS 3672(1):52-69. London, England.
      • Chen, G., M. Kandemir. August 2005. Dataflow Analysis for Energy-efficient Scratch-pad Memory Management. Proceedings of the International Symposium on Low Power Electronics and Design (ISLPED 2005). pp. 327-330. San Diego, CA. (Poster presentation) (31% acceptance rate)
      • Son, S. W., G. Chen, M. Kandemir. August 2005. Power-aware Code Scheduling for Clusters of Active Disks. Proceedings of the International Symposium on Low Power Electronics and Design (ISLPED 2005). pp 293-298. San Diego, CA. (31% acceptance rate)
      • Kandemir, M., S. W. Son, G. Chen. August 2005. An Evaluation of Code and Data Optimizations in the Context of Disk Power Reduction. Proceedings of the International Symposium on Low Power Electronics and Design (ISLPED 2005). pp. 209-214. San Diego, CA. (31% acceptance rate)
      • Chen, G., M. Kandemir, M. Karakoy. June 28-July 1, 2005. A Data-centric Approach to Checksum Reuse for Array-intensive Applications. Proceedings of the International Conference on Dependable Systems and Networks (DSN'05). pp. 316-325. Yokohama, Japan.
      • Son, S. W., G. Chen, M. Kandemir. June 2005. Disk Layout Optimization for Reducing Energy Consumption. Proceedings of the Nineteenth ACM International Conference on Supercomputing (ICS'05). pp. 274-283. Cambridge, MA. (28% acceptance rate)
      • Son, S. W., G. Chen, M. Kandemir, A. Choudhary. June 2005. Exposing Disk Layout to Compiler for Reducing Energy Consumption of Parallel Disk Based Systems. Proceedings of the Symposium on Principles and Practice of Parallel Programming (PPoPP'05). pp. 174-185. Chicago, IL. (31% acceptance rate)
      • Kandemir, M., G. Chen, I. Kadayif. June 2005. Compiling for Memory Emergency. Proceedings of the ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES'05). pp. 213-221. Chicago, IL. (26% acceptance rate)
      • Chen, G., M. Kandemir. June 2005. Improving Java Virtual Machine Reliability for Memory-constrained Embedded Systems. Proceedings of the Forty-Second Design Automation Conference (DAC'05). pp. 690-695. Anaheim, CA. (21% acceptance rate)
      • Li, F., M. Kandemir. June 2005. Locality-conscious Workload Assignment for Array-based Computations in MPSOC Architectures. Proceedings of the Forty-Second Design Automation Conference (DAC'05). pp. 95-100. Anaheim, CA. (21% acceptance rate)
      • Chen, G., M. Kandemir, M. J. Irwin. June 2005. Exploiting Frequent Field Values in Java Objects for Reducing Heap Memory Requirements. Proceedings of the First ACM/USENIX Conference on Virtual Execution Environments (VEE'05). pp. 68-78. Chicago, IL. (29% acceptance rate)
      • Li, F., M. Kandemir. May 2005. Increasing Data TLB Resilience to Transient Errors. Proceedings of the IEEE Computer Society Annual Symposium on VLSI (ISVLSI '05). pp. 297-298. Tampa, FL.
      • Saputra, H., O. Ozturk, N. Vijaykrishnan, M. Kandemir, R. Brooks. May 2005. A Data-driven Approach for Embedded Security. Proceedings of the IEEE Computer Society Annual Symposium on VLSI (ISVLSI '05). pp. 104-109. Tampa, FL.
      • Chen, G., G. Chen, O. Ozturk, M. Kandemir. May 2005. Exploiting Inter-processor Data Sharing for Improving Behavior of Multi-processor SoCs. Proceedings of the IEEE Computer Society Annual Symposium on VLSI (ISVLSI '05). pp. 90-95. Tampa, FL.
      • Ozturk, O., M. Kandemir, M. J. Irwin. April 2005. Using Data Compression in an MPSoC Architecture for Improving Performance. Proceedings of ACM Great Lakes Symposium on VLSI (GLSVLSI 2005). pp. 353-356. Chicago, IL.
      • Memik, G., M. Kandemir, A. Mallik. April 2005. Load Elimination for Low-power Embedded Processors. Proceedings of ACM Great Lakes Symposium on VLSI (GLSVLSI 2005). pp. 282-285. Chicago, IL.
      • Ozturk, O., M. Kandemir. April 2005. Energy Management in Software-controlled Multi-level Memory Hierarchies. Proceedings of ACM Great Lakes Symposium on VLSI (GLSVLSI 2005). pp. 270-275. Chicago, IL.
      • Ozturk, O., M. Kandemir. April 2005. Integer Linear Programming Based Energy Optimization for Banked DRAMs. Proceedings of ACM Great Lakes Symposium on VLSI (GLSVLSI 2005). pp. 92-95. Chicago, IL.
      • Chiu, S. C., A. Choudhary, M. Kandemir. April 2005. Fault Recovery Designs for Processor-Embedded Distributed Storage Architectures with I/O-Intensive DB Workloads. Proceedings of the Twenty-Second IEEE – Thirteenth NASA Goddard Conference on Mass Storage Systems and Technologies (MSST 2005). pp. 278-285. Monterey, CA.
      • Li, F., Chen, G., M. Kandemir, R. Brooks. April 2005. A Compiler-based Approach to Data Security. Proceedings of the Fourteenth International Conference on Compiler Construction (CC'05). pp. 188-203. Edinburgh, Scotland. (Narayanan to present)
      • Chen, G., K. Malkowski, M. Kandemir, P. Raghavan. April 2005. Reducing Power with Performance Constraints for Parallel Sparse Applications. Proceedings of the First Workshop on High-Performance, Power-Aware Computing (HP-PAC 2005), in conjunction with IPDPS 2005. p. 231a. Denver, CO.
      • Coloma, K., A. N. Choudhary, A. Ching, W-K. Liao, S. W. Son, M. Kandemir, L. Ward. April 2005. Power and Performance in I/O for Scientific Applications. Proceedings of the Workshop on NSF Next Generation Software Program, in conjunction with IPDPS 2005. p. 224b. Denver, CO.
      • Chen, G., M. Kandemir, S. Tosun, U. Sezer. April 2005. Reliability-Conscious Process Scheduling under Performance Constraints in FPGA-Based Embedded Systems. Proceedings of the Twelfth Reconfigurable Architectures Workshop (RAW'05), in conjunction with IPDPS 2005. p. 162a. Denver, CO.
      • Liu, C., A. Sivasubramaniam, M. Kandemir, M. J. Irwin. April 2005. Exploiting Barriers to Optimize Power Consumption of CMPs. Proceedings of the International Parallel Distributed Processing Symposium (IPDPS 2005). p. 5a. Denver, CO.
      • Son, S. W., M. Kandemir, A. Choudhary. April 2005. Software-directed Disk Power Management for Scientific Applications. Proceedings of the International Parallel Distributed Processing Symposium (IPDPS 2005). p. 4a. Denver, CO.
      • Tosun, S., N. Mansouri, E. Arvas, M. Kandemir, Y. Xie. March 2005. Reliability-centric Hardware/Software Codesign. Proceedings of the Sixth International Symposium on Quality Electronic Design (ISQED 2005). pp. 375-380. San Jose, CA.
      • Tosun S., O. Ozturk, N. Mansouri, E. Arvas, M. Kandemir, Y. Xie. March 2005. An ILP Formulation for Reliability-Oriented High-Level Synthesis. Proceedings of the Sixth International Symposium on Quality Electronic Design (ISQED 2005). pp. 364-369. San Jose, CA.
      • Vilayannur, M., A. Sivasubramaniam, M. Kandemir. March 2005. Proactive Page Replacement for Scientific Applications: A Characterization. Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS'05). pp. 248-257. Austin, TX. [27 accepted out of 92 submissions] (29% acceptance rate)
      • Chen, G., M. Kandemir. March 2005. Optimizing Address Code Generation for Array-intensive DSP Applications. Proceedings of the International Symposium on Code Generation and Optimization (CGO'05). pp. 141-152. San Jose, CA. (~30% acceptance rate)
      • Chen, G, G. Chen. O. Ozturk, M. Kandemir. March 2005. An Adaptive Locality-Conscious Process Scheduler for Embedded Systems. Embedded Technology and Applications Symposium (RTAS 2005). pp. 354-364. San Francisco, CA.
      • Tosun, S., N. Mansouri, E. Arvas, M. Kandemir, Y. Xie. March 2005. Reliability-centric High-level Synthesis. Proceedings of the Design, Automation, and Test in Europe (DATE 2005). pp. 1258-1263. Munich, Germany. (21% acceptance rate)
      • Chen, G., M. Kandemir, M. Karakoy. March 2005. A Constraint Network Based Approach to Memory Layout Optimization. Proceedings of the Design, Automation, and Test in Europe (DATE 2005). pp. 1156-1161. Munich, Germany. (21% acceptance rate)
      • Hu, J., F. Li, V. Degalahal, M. Kandemir, N. Vijaykrishnan, M. J. Irwin. March 2005. Compiler-directed Instruction Duplication for Soft Error Detection. Proceedings of the Design, Automation, and Test in Europe (DATE 2005). pp. 1056-1057. Munich, Germany. (21% acceptance rate)
      • Ozturk, O., M. Kandemir, M. J. Irwin. March 2005. BB-GC: Basic-block Level Garbage Collection. Proceedings of the Design, Automation, and Test in Europe (DATE 2005). 1032-1037. Munich, Germany. (21% acceptance rate)
      • Kandemir, M., F. Li, G. Chen, G. Chen, O. Ozturk. March 2005. Studying Storage-Recomputation Tradeoffs in Memory-constrained Embedded Processing. Proceedings of the Design, Automation, and Test in Europe (DATE 2005). pp. 1026-1031. Munich, Germany. (21% acceptance rate)
      • Hung, W-L., Y. Xie, N. Vijaykrishnan, M. Kandemir, M. J. Irwin. March 2005. Thermal-Aware Allocation and Scheduling for Systems-on-a-Chip Design. Proceedings of the Design, Automation, and Test in Europe (DATE 2005). pp. 898-899. Munich, Germany. (21% acceptance rate)
      • Ozturk, O., H. Saputra, M. Kandemir, I. Kolcu. March 2005. Access Pattern-based Code Compression for Memory-constrained Embedded Systems. Proceedings of the Design, Automation, and Test in Europe (DATE 2005). pp. 882-887. Munich, Germany. (21% acceptance rate)
      • Kandemir, M., G. Chen. March 2005. Locality-aware Process Scheduling for Embedded MPSoCs. Proceedings of the Design, Automation, and Test in Europe (DATE 2005). pp. 870-875. Munich, Germany. (21% acceptance rate)
      • Ozturk, O., M. Kandemir. March 2005. Nonuniform Banking for Reducing Memory Energy Consumption. Proceedings of the Design, Automation, and Test in Europe (DATE 2005). pp. 814-819. Munich, Germany. (21% acceptance rate)
      • Memik, G., M. Kandemir, O. Ozturk. March 2005. Increasing Register File Immunity to Transient Errors. Proceedings of the Design, Automation, and Test in Europe (DATE 2005). pp. 586-591. Munich, Germany. (21% acceptance rate)
      • Sri Hari Krishna, N., S. W. Son, M. Kandemir, F. Li. January 2005. Using Loop Invariants to Fight Soft Errors in Data Caches. Proceedings of the Asia South Pacific Design Automation Conference (ASP-DAC 2005). pp. 1317-1320. Shanghai, China.
      • Chen, G., F. Li, M. Kandemir, I. Demirkiran. January 2005. Increasing FPGA Resilience Against Soft Errors Using Task Duplication. Proceedings of the Asia South Pacific Design Automation Conference (ASP-DAC 2005). pp. 924-927. Shanghai, China.
      • Kandemir, M., G. Chen, F. Li, I. Demirkiran. January 2005. Using Data Replication to Reduce Communication Energy on Chip Multiprocessors. Proceedings of the Tenth Asia and South Pacific Design Automation Conference (ASP-DAC 2005). pp. 769-772. Shanghai, China.
      • Ozturk, O., M. Kandemir, G. Chen, M. J. Irwin. January 2005. Customized On-chip Memories for Embedded Chip Multiprocessors. Proceedings of the Asia South Pacific Design Automation Conference (ASP-DAC 2005). pp. 743-748. Shanghai, China.
      • Chen, G., M. Kandemir, M. J. Irwin. January 2005. Compiler-directed Selective Data Protection against Soft Errors. Proceedings of the Asia South Pacific Design Automation Conference (ASP-DAC 2005). pp. 713-716. Shanghai, China.
      • Conner, J., Y. Xie, M. Kandemir, R. Dick, G. Link. January 2005. FD-HGAC: A Hybrid Heuristic/Genetic Algorithm Hardware/Software Co-synthesis Framework with Fault Detection. Proceedings of the Asia South Pacific Design Automation Conference (ASP-DAC 2005). pp. 709-712. Shanghai, China.
      • Kadayif, I., M. Kandemir, G. Chen. January 2005. Studying Interactions between Prefetching and Cache Line Turnoff. Proceedings of the Asia South Pacific Design Automation Conference (ASP-DAC 2005). pp. 545-548. Shanghai, China.
      • Chen, G., M. Kandemir. January 2005. Optimizing Embedded Applications Using Programmer-inserted Hints. Proceedings of the Tenth Asia and South Pacific Design Automation Conference (ASP-DAC 2005). pp. 157-160. Shanghai, China.
      • Pisharath, J., A. Choudhary, M. Kandemir. November 2004. Energy Management Schemes for Memory-resident Database Systems. Proceedings of the Thirteenth International Conference on Information and Knowledge Management (CIKM'04). pp. 218-227. Washington, D.C.
      • Kandemir, M., M. J. Irwin, G. Chen, I. Kolcu. November 2004. Banked Scratch-pad Memory Management for Reducing Leakage Energy Consumption. Proceedings of the International Conference on Computer Aided Design (ICCAD-2004). pp. 120-124. San Jose, CA.
      • Srinivasan, S., A. Gayasen, N. Vijaykrishnan, M. Kandemir, Y. Xie, M. J. Irwin. November 2004. Improving Soft-error Tolerance of FPGA Configuration Bits. Proceedings of the International Conference on Computer Aided Design (ICCAD-2004). pp. 107-110. San Jose, CA. (24% acceptance rate)
      • Chen, G., M. Kandemir, N. Vijaykrishnan, M. J. Irwin. October 2004. Field-level Analysis for Heap Space Optimization in Embedded Java. Proceedings of the International Symposium on Memory Management (ISMM'04). pp. 131-142. Vancouver, British Columbia, Canada. (35% acceptance rate)
      • Xie, Y., L. Li, M. Kandemir, N. Vijaykrishnan, M. J. Irwin. September 2004. Reliability-aware Cosynthesis for Embedded Systems. Proceedings of the Fifteenth IEEE International Conference on Application-Specific Systems, Architectures, and Processors (ASAP'04). pp. 41-50. Galveston, TX.
      • Pisharath, J., A. Choudhary, M. Kandemir. September 2004. Reducing Energy Consumption of Queries in Memory-resident Database Systems. Proceedings of the International Conference on Compilers, Architectures, and Synthesis for Embedded Systems (CASES'04). pp. 35-45. Washington, D.C.
      • Kandemir, M., O. Ozturk, M. Karakoy. September 2004. Dynamic On-chip Memory Management for Chip Multiprocessors. Proceedings of the International Conference on Compilers, Architectures, and Synthesis for Embedded Systems (CASES'04). pp. 14-23. Washington, D.C.
      • Chen, G., M. Kandemir. September 2004. An ILP-based Approach to Locality Optimization. Proceedings of the Seventeenth International Workshop on Languages and Compilers for Parallel Computing (LCPC'04). pp. 149-163. West Lafayette, IN.
      • Chen, G., M. Kandemir, N. Vijaykrishnan, A. Sivasubramaniam, M. J. Irwin. September 2004. Analyzing Object Error Behavior in Embedded JVM Environments. Proceedings of the IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and Systems Synthesis (CODES+ISSS'04). pp. 230-235. Stockholm, Sweden. (25% acceptance rate)
      • Kandemir, M., I. Kadayif, G. Chen. September 2004. Compiler-directed Code Restructuring for Reducing Data TLB Energy. Proceedings of the IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and Systems Synthesis (CODES+ISSS'04). pp. 98-103. Stockholm, Sweden. (25% acceptance rate)
      • Kandemir, M., G. Chen, F. Li. September 2004. Reliability-aware OS Support for FPGA-based Systems. Proceedings of the Annual Military and Aerospace Applications of Programmable Devices and Technologies Conference (MAPLD'04). pp. 11-18. Washington, D.C.
      • De La Luz, V., M. Kandemir, A. Sivasubramaniam, M. J. Irwin. August-September 2004. Exploring the Possibility of Operating in the Compressed Domain. Proceedings of the International Conference on Parallel and Distributed Computing (Euro-Par'04). Springer-Verlag LNCS 3149(1):507-515. Pisa, Italy.
      • Kandemir, M., O. Ozturk, M. J. Irwin, I. Kolcu. August-September 2004. Using Data Compression to Increase Energy Savings in Multi-bank Memories. Proceedings of the International Conference on Parallel and Distributed Computing (Euro-Par'04). pp. 310-317. Pisa, Italy.
      • Kadayif, I., M. Kandemir, I. Demirkiran. August-September 2004. Compiler-guided Code Restructuring for Improving Instruction TLB Energy Behavior. Proceedings of the International Conference on Parallel and Distributed Computing (Euro-Par'04). pp. 304-309. Pisa, Italy.
      • Gayasen, A., K. Lee, N. Vijaykrishnan, M. Kandemir, M. J. Irwin, T. Tuan. August-September 2004. A Dual Vdd Low-power FPGA Architecture. Proceedings of the International Conference on Field-programmable Logic and Its Applications (FPL'04). pp. 145-157. Antwerpen, Belgium.
      • Hung, W., Y. Xie, N. Vijaykrishnan, M. Kandemir, M. J. Irwin. August 2004. Total Power Optimization through Simultaneously Multiple-VDD Multiple-VTH Assignment and Device Sizing With Stack Forcing. Proceedings of the International Symposium on Low Power Electronics and Design (ISLPED 2004). pp. 144-149. Newport Beach, CA. (34% acceptance rate)
      • Li, L., V. Degalahal, N. Vijaykrishnan, M. Kandemir, M. J. Irwin. August 2004. Soft Error and Energy Consumption Interactions: A Data Cache Perspective. Proceedings of the International Symposium on Low Power Electronics and Design (ISLPED 2004). pp. 132-137. Newport Beach, CA. (34% acceptance rate)
      • Pisharath, J., A. Choudhary, M. Kandemir. July 2004. A Window-Based Approach to Retrieving Memory-Resident Data for Query Execution. Proceedings of the Eighth International Database Engineering & Applications Symposium (IDEAS '04). pp. 283-288. Coimbra, Portugal.
      • Saputra, H., G. Chen, R. Brooks, N. Vijaykrishnan, M. Kandemir, M. J. Irwin. June 2004. Code Protection for Resource-constrained Embedded Devices. Proceedings of the ACM SIGPLAN/SIGBED 2004 Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES '04). pp. 240-248. Washington, D.C. [28 accepted out of 120 submissions] (23% acceptance rate)
      • Ozturk, O., M. Kandemir, I. Demirkiran, G. Chen, M. J. Irwin. June 2004. Data Compression for Improving SPM Behavior. Proceedings of the Forty-First Design Automation Conference (DAC'04). pp. 401-406. San Diego, CA. [Best Paper Candidate] (21% acceptance rate)
      • Kandemir, M. June 2004. LODS: Locality-oriented Dynamic Scheduling for On-chip Multiprocessors. Proceedings of the Forty-First Design Automation Conference (DAC'04). pp. 125-128. San Diego, CA. (21% acceptance rate)
      • Ozturk, O., M. Kandemir, M. J. Irwin, I. Kolcu. April 2004. Tuning Data Replication for Improving Behavior of MPSoC Applications. Proceedings of the 2004 Great Lakes Symposium on VLSI (GLSVLSI'04). pp. 170-173. Boston, MA.
      • Lattanzi, E., A. Bogliolo, A. Gayasen, M. Kandemir, N. Vijaykrishnan, L. Benini. April 2004. Improving Java Performance Using Dynamic Method Migration on FPGAs. Proceedings of the Eleventh Reconfigurable Architectures Workshop (RAW 2004). p. 134. Santa Fe, NM.
      • Swankoski, E., R. Brooks, N. Vijaykrishnan, M. Kandemir, M. J. Irwin. April 2004. A Parallel Architecture for Secure FPGA Symmetric Encryption. Proceedings of the Eleventh Reconfigurable Architectures Workshop (RAW 2004). p. 132. Santa Fe, NM.
      • Kandemir, M. April 2004. Exploiting Memory Bank Locality in Multiprocessor SoC Architectures. Proceedings of the Eighteenth International Parallel and Distributed Processing Symposium (IPDPS'04). p. 92b. Santa Fe, NM.
      • Li, F., M. Kandemir. April 2004. Improving Performance of Java Applications Using a Coprocessor. Proceedings of the Thirteenth International Heterogeneous Computing Workshop (HCW 2004), in conjunction with the Eighteenth International Parallel and Distributed Processing Symposium (IPDPS'04). p. 109a. Santa Fe, NM.
      • Li, F., P. Agrawal, G. Eberhardt, E. Manavoglu, S. Ugurel, M. Kandemir. April 2004. Improving Memory Performance of Embedded Java Applications by Dynamic Layout Modifications. Proceedings of the Sixth International Workshop on Java for Parallel and Distributed Computing, in conjunction with the Eighteenth International Parallel and Distributed Processing Symposium (IPDPS'04). p. 159b. Santa Fe, NM.
      • Demiroz, B., H. Topcuoglu, M. Kandemir. April 2004. A Hybrid Evolutionary Algorithm for Solving the Register Allocation Problem. Proceedings of the Fourth European Conference on Evolutionary Computation in Combinatorial Optimization (EvoCOP'04). pp. 62-71. Coimbra, Portugal.
      • Kadayif, I., Nath, P., M. Kandemir, A. Sivasubramaniam. March 2004. Compiler-directed Physical Address Generation for Reducing dTLB Power. Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS'04). pp. 161-168. Austin, TX.
      • Gayasen, A., Y. Tsai, N. Vijaykrishnan, M. Kandemir, M. J. Irwin. February 2004. Reducing Leakage Energy in FPGAs Using Region-constrained Placement. Proceedings of the ACM International Symposium on Field-Programmable Gate Arrays (FPGA'04). pp. 51-58. Monterey, CA.
      • Pirreti, M., G. Link, R. Brooks, N. Vijaykrishnan, M. Kandemir, M. J. Irwin. February 2004. Fault-tolerant Algorithms for Network-on-chip Interconnect. Proceedings of the IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2004). pp. 46-51. Lafayette, LA. [29 accepted out of 123 submissions] (24% acceptance rate)
      • Pisharath, J., A Choudhary, M. Kandemir. February 2004. Data Windows: A Data-centric Approach for Query Execution in Memory-resident Databases. Proceedings of the Design Automation and Test in Europe Conference (DATE'04). Volume 2, pp. 21352-21353. Paris, France. [181 accepted out of 780 submissions] (23% acceptance rate)
      • Kadayif, I., I. Kolcu, M. Kandemir, N. Vijaykrishnan, M. J. Irwin. February 2004. Exploiting Processor Workload Heterogeneity for Reducing Energy Consumption in Chip Multiprocessor. Proceedings of the Design Automation and Test in Europe Conference (DATE'04). Volume 2, pp. 21158-21163. Paris, France. [181 accepted out of 780 submissions] (23% acceptance rate)
      • Kadayif, I., M. Kandemir. February 2004. Tuning In-sensor Data Filtering to Reduce Energy Consumption in Wireless Sensor Networks. Proceedings of the Design Automation and Test in Europe Conference (DATE'04). Volume 2, pp. 20852-20857. Paris, France. [181 accepted out of 780 submissions] (23% acceptance rate)
      • Kandemir, M. February 2004. Impact of Data Transformations on Memory Bank Locality. Proceedings of the Design Automation and Test in Europe Conference (DATE'04). Volume 1, pp. 10506-10511. Paris, France. [181 accepted out of 780 submissions] (23% acceptance rate)
      • Chen, G., M. Kandemir, U. Sezer. February 2004. Configuration-sensitive Process Scheduling for FPGA-based Computing Platforms. Proceedings of the Design Automation and Test in Europe Conference (DATE'04). Volume 1, 10486-10493. Paris, France. [181 accepted out of 780 submissions] (23% acceptance rate)
      • Hu, J. S., N. Vijaykrishnan, S. Kim, M. Kandemir, M. J. Irwin. February 2004. Scheduling Reusable Instructions for Power Reduction. Proceedings of the Design Automation and Test in Europe Conference (DATE'04). Volume 1, pp. 148-155. Paris, France. [181 accepted out of 780 submissions] (23% acceptance rate)
      • Li, L., N. Vijaykrishnan, M. Kandemir, M. J. Irwin. February 2004. A Crosstalk Aware Interconnect with Variable Cycle Transmission. Proceedings of the Design Automation and Test in Europe Conference (DATE'04). Volume 1, pp. 102-107. Paris, France. [181 accepted out of 780 submissions] (23% acceptance rate)
      • Liu, C., A. Sivasubramaniam, M. Kandemir. February 2004. Organizing the Last Line of Defense Before Hitting the Memory Wall for CMPs. Proceedings of the Tenth International Symposium on High Performance Computer Architecture (HPCA-10). pp. 176-185. Madrid, Spain. [27 accepted out of 151 submissions] (17.9% acceptance rate)
      • Liu, C., A. Sivasubramaniam, M. Kandemir. February 2004. Optimizing Bus Energy Consumption of On-Chip Multiprocessors Using Frequent Values. Proceedings of the Twelfth Euromicro Conference on Parallel and Distributed Processing (PDP2004). pp. 340-349. Coruña, Spain.
      • Vilayannur, M., R. B. Ross, P. H. Carns, R. Thakur, A. Sivasubramaniam, M. Kandemir. February 2004. On the Performance of the POSIX I/O Interface to PVFS. Proceedings of the Twelfth Euromicro Conference on Parallel and Distributed Processing (PDP2004). pp. 332-339. A Coruña, Spain.
      • Chen, G., M. Kandemir, U. Sezer, A. Nadgir. November 2003. Array Composition and Decomposition for Optimizing Embedded Applications. Proceedings of the International Conference on Computer Aided Design (ICCAD-2003). pp. 193-196. San Jose, CA. [130 accepted out of 490 submissions] (26.5% acceptance rate)
      • Li, L., N. Vijaykrishnan, M. Kandemir, M. J. Irwin. November 2003. Adaptive Error Protection for Energy Efficiency. Proceedings of the International Conference on Computer Aided Design (ICCAD-2003). pp. 2-7. San Jose, CA. [130 accepted out of 490 submissions] (26.5% acceptance rate)
      • Zhang, W., M. Kandemir, A. Sivasubramaniam, M. J. Irwin. October-November 2003. Performance, Energy, and Reliability Tradeoffs in Replicating Hot Cache Lines. Proceedings of the International Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES '03). pp. 309-317. San Jose, CA. [31 accepted out of 162 submissions] (19% acceptance rate)
      • U. Sezer, G. Chen, M. Kandemir, H. Saputra, M. J. Irwin. October-November 2003. Exploiting Bank Locality in Multi-bank Memories. Proceedings of the International Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES '03). pp. 287-297. San Jose, CA. [31 accepted out of 162 submissions] (19% acceptance rate)
      • Chen, G., M. Kandemir, N. Vijaykrishnan, M. J. Irwin, B. Mathiske, M. Wolczko. October 2003. Heap Compression for Memory-constrained Java Environments. Proceedings of the Eighteenth Annual ACM SIGPLAN Conference on Object-Oriented Programming, Systems, Languages, and Applications (OOPSLA'03). pp. 282-301. Anaheim, CA. [26 accepted out of 142 submissions] (18.3% acceptance rate)
      • De La Luz, V., A. Sivasubramaniam, M. Kandemir, M. J. Irwin, N. Vijaykrishnan. October 2003. Reducing dTLB Energy Through Dynamic Resizing. Proceedings of the Twenty-First International Conference on Computer Design (ICCD 2003). pp. 358-363. San Jose, CA. [78 accepted out of 233 submissions] (33.4% acceptance rate)
      • De La Luz, V., M. Kandemir, G. Chen, M. J. Irwin, I. Kolcu. October 2003. Energy-conscious Memory Allocation and Deallocation for Pointer-intensive Applications. Proceedings of the Third International Conference on Embedded Software (EMSOFT'03). pp. 156-172. Philadelphia, PA. [20 accepted out of 59 submissions] (33.8% acceptance rate)
      • Chen, G., G. Chen, M. Kandemir, A. Nadgir. October 2003. Compiler-based Code Partitioning for Intelligent Embedded Disk Processing. Proceedings of the Sixteenth International Workshop on Languages and Compilers for Parallel Computing (LCPC'03). College Station, TX.
      • Chen, G., N. Vijaykrishnan, M. Kandemir, M. J. Irwin, M. Wolczko. October 2003. Tracking Object Life Cycle for Leakage Energy Optimization. Proceedings of the CODES-ISSS Merged Conference (CODES/ISSS'03). pp. 213-218. Newport Beach, CA. [30 accepted out of 143 submissions] (21% acceptance rate)
      • Hegde, A., N. Vijaykrishnan, M. Kandemir, M. J. Irwin. October 2003. VL-CDRAM: Variable Line Sized Cached DRAMs. Proceedings of the CODES-ISSS Merged Conference (CODES/ISSS'03). pp. 132-137. Newport Beach, CA. [30 accepted out of 143 submissions] (21% acceptance rate)
      • Kadayif, I., M. Kandemir, G. Chen. September 2003. Influence of Communication Optimizations on on-chip Multi-processor Energy. Proceedings of the IEEE International SOC Conference (ASIC/SOC'03). pp. 255-256. Portland, OR.
      • Chen, G., M. Kandemir, I. Kolcu. September 2003. An Integrated Optimization Strategy for Saving Energy on Multiprocessor-on-a-chip Architectures. Proceedings of the IEEE International SOC Conference (ASIC/SOC'03). pp. 253-254. Portland, OR.
      • Chen, G., G. Chen, M. Kandemir, N. Vijaykrishnan, M. J. Irwin. September 2003. Energy-aware Code Cache Management for Memory-constrained Java Devices. Proceedings of the IEEE International SOC Conference (ASIC/SOC'03). pp. 179-182. Portland, OR.
      • Nadgir, A., M. Kandemir, G. Chen. September 2003. An Access Pattern Based Energy Management Strategy for Instruction Caches. Proceedings of the IEEE International SOC Conference (ASIC/SOC'03). pp. 175-178. Portland, OR.
      • Chen G., G. Chen, I. Kadayif, W. Zhang, M. Kandemir, I. Kolcu, U. Sezer. September 2003. Compiler-Directed Management of Instruction Accesses. Proceedings of the Euromicro Symposium on Digital System Design (DSD'2003). pp. 459-462. Belek, Turkey.
      • Li, L., N. Vijaykrishnan, M. Kandemir, M. J. Irwin, I. Kadayif. September 2003. CCC: Crossbar Connected Caches for Reducing Energy. Proceedings of the Euromicro Symposium on Digital System Design (DSD'2003). pp. 41-48. Belek, Turkey.
      • Saputra, H., N. Vijaykrishnan, M. Kandemir, R. Brooks, M. J. Irwin. August 2003. Exploiting Value Locality for Secure Energy Aware Communication. Proceedings of the IEEE Workshop on Signal Processing Systems (SIPS'03). pp. 116-121. Seoul, Korea.
      • Kadayif, I., M. Kandemir, A. Choudhary, M. Karakoy. August 2003. An Energy-oriented Evaluation of Communication Optimizations for Microsensor Networks. Proceedings of the International Conference on Parallel and Distributed Computing (Euro-Par'03). pp. 279-286. Klagenfurt, Austria.
      • Chen, G., M. Kandemir, I. Kolcu, A. Choudhary. August 2003. Exploiting on-chip Data Transfers for Improving Performance of Chip-scale Multiprocessors. Proceedings of the International Conference on Parallel and Distributed Computing (Euro-Par'03). pp. 271-278. Klagenfurt, Austria.
      • Kim, E. J., K. H. Yum, G. Link, N. Vijaykrishnan, M. Kandemir, M. J. Irwin, C. R. Das. August 2003. Energy Optimization Techniques in Cluster Interconnects. Proceedings of the International Symposium on Low Power Electronics and Design (ISLPED'03). pp. 459-464. Seoul, Korea. [17 accepted as long papers out of 221 submissions] (7.6% acceptance rate)
      • Hu, J., N. Vijaykrishnan, M. Kandemir, M. J. Irwin. August 2003. Exploiting Program Hotspots and Code Sequentiality for Instruction Cache Leakage Management. Proceedings of the International Symposium on Low Power Electronics and Design (ISLPED'03). pp. 402-407. Seoul, Korea. [91 accepted out of 221 submissions] (41% acceptance rate)
      • Kim, H. S., N. Vijaykrishnan, M. Kandemir, E. Brockmeyer, F. Catthoor, M. J. Irwin. August 2003. Estimating Influence of Data Layout Optimizations on SDRAM Energy Consumption. Proceedings of the International Symposium on Low Power Electronics and Design (ISLPED'03). pp. 40-43. Seoul, Korea. [91 accepted out of 221 submissions] (41% acceptance rate)
      • Zhang, W, M. Karakoy, M. Kandemir, G. Chen. June 2003. A Compiler Approach for Reducing Data Cache Energy. Proceedings of the Seventeenth Annual ACM International Conference on Supercomputing (ICS'03). pp. 76-85. San Francisco, CA. [36 accepted out of 171 submissions] (21% acceptance rate)
      • Zhang, W., S. Gurumurthi, M. Kandemir, A. Sivasubramaniam. June 2003. ICR: In-Cache Replication for Enhancing Cache Reliability. Proceedings of the International Conference on Dependable Systems and Networks (DSN-2003). pp. 291-304. San Francisco, CA.
      • Kim, H. S., N. Vijaykrishnan, M. Kandemir, M. J. Irwin. June 2003. Adapting Instruction Level Parallelism for Optimizing Leakage in VLIW Architectures. Proceedings of the Workshop on Languages, Compilers, and Tools for Embedded Systems (LCTES'03). pp. 275-283. San Diego, CA. [29 accepted out of 128 submissions] (23% acceptance rate)
      • Unnikrishnan, P., G. Chen, M. Kandemir, M. Karakoy, I. Kolcu. June 2003. Loop Transformations for Reducing Data Space Requirements of Resource-constrained Applications. Proceedings of the Tenth Annual International Static Analysis Symposium (SAS'03). pp. 383-400. San Diego, CA. [25 accepted out of 82 submissions] (30.5% acceptance rate)
      • Gurumurthi, S., A. Sivasubramaniam, M. Kandemir, H. Franke. June 2003. Dynamic Speed Control for Server Class Disks. Proceedings of the Thirtieth Annual International Symposium on Computer Architecture (ISCA 2003). pp. 169-179. San Diego, CA. [37 accepted out of 185 submissions] (20% acceptance rate)
      • Zhang, W., G. Chen, M. Kandemir, M. Karakoy. June 2003. Interprocedural Optimizations for Improving Data Cache Performance of Array-intensive Embedded Applications. Proceedings of the Fortieth Design Automation Conference (DAC '03). pp. 887-892. Anaheim, CA. [152 accepted out of 628 submissions] (24% acceptance rate)
      • Vilayannur, M., A. Sivasubramaniam, M. Kandemir, R. Thakur, R. Ross. May 2003. Discretionary Caching for I/O on Clusters. Proceedings of the ACM/IEEE International Symposium on Cluster Computing and the Grid (CCGrid 2003). pp. 96-103. Tokyo, Japan.
      • Chen, G., B. Kang, M. Kandemir, N. Vijaykrishnan, M. J. Irwin, R. Chandramouli. April 2003. Energy-Aware Compilation and Execution in Java-Enabled Mobile Devices. Proceedings of the International Parallel and Distributed Processing Symposium (IPDPS 2003). (CD-ROM). Nice, France. [119 accepted out of 407 submissions] (29.3% acceptance rate)
      • Gurumurthi, S., N. An, A. Sivasubramaniam, N. Vijaykrishnan, M. Kandemir, M. J. Irwin. April 2003. Energy and Performance Considerations in Work Partitioning for Mobile Spatial Queries. Proceedings of the International Parallel and Distributed Processing Symposium (IPDPS 2003). (CD-ROM). Nice, France. [119 accepted out of 407 submissions] (29.3% acceptance rate)
      • Kandemir, M., M. J. Irwin, G. Chen, J. Ramanujam. April 2003. Address Register Assignment for Reducing Code Size. Proceedings of the Twelfth International Conference on Compiler Construction (CC'03). Springer-Verlag LNCS 2622:273-289. Warsaw, Poland. (25.3% acceptance rate)
      • Zhang, W., M. Kandemir, N. Vijaykrishnan, M. J. Irwin, V. De. March 2003. Compiler Support for Reducing Leakage Energy Consumption. Proceedings of International Conference on Design Automation and Test in Europe (DATE 2003). pp. 11146-11147. Munich, Germany. [201 accepted out of 590 submissions] (34% acceptance rate)
      • Kandemir, M., I. Kolcu, W. Zhang. March 2003. Implementation and Evaluation of an On-Demand Parameter-Passing Strategy for Reducing Energy. Proceedings of International Conference on Design Automation and Test in Europe (DATE 2003). pp. 11058-11063. Munich, Germany. [201 accepted out of 590 submissions] (34% acceptance rate)
      • De La Luz, V., M. Kandemir, I. Kadayif, U. Sezer. March 2003. Generalized Data Transformations for Enhancing Cache Behavior. Proceedings of International Conference on Design Automation and Test in Europe (DATE 2003). pp. 10906-10911. Munich, Germany. [201 accepted out of 590 submissions] (34% acceptance rate)
      • Memik, G., M. Haldar, A. Choudhary, M. Kandemir, I. Kadayif. March 2003. An Integrated Approach for Improving Cache Behavior. Proceedings of International Conference on Design Automation and Test in Europe (DATE 2003). pp. 10796-10801. Munich, Germany. [98 accepted out of 590] (16.6% acceptance rate for long papers)
      • Kandemir, M., W. Zhang, M. Karakoy. March 2003. Runtime Code Parallelization for On-Chip Multiprocessors. Proceedings of International Conference on Design Automation and Test in Europe (DATE 2003). pp. 10510-10515. Munich, Germany. [201 accepted out of 590 submissions] (34% acceptance rate)
      • Kandemir, M., G. Chen, W. Zhang, I. Kolcu. March 2003. Data Space Oriented Scheduling in Embedded Systems. Proceedings of International Conference on Design Automation and Test in Europe (DATE 2003). pp. 10416-10427. Munich, Germany. [201 accepted out of 590 submissions] (34% acceptance rate)
      • Saputra, H., N. Vijaykrishnan, M. Kandemir, M. J. Irwin, R. Brooks, S. Kim, W. Zhang. March 2003. Masking the Energy Behavior of DES Encryption. Proceedings of International Conference on Design Automation and Test in Europe (DATE 2003). pp. 10084-10089. Munich, Germany. [98 long papers accepted out of 590 submissions] (16.6% acceptance rate for long papers)
      • Gurumurthi, S., J. Zhang, A. Sivasubramaniam, M. Kandemir, H. Franke, N. Vijaykrishnan, M. J. Irwin. March 2003. Interplay of Energy and Performance for Disk Arrays Running Transaction Processing Workloads. Proceedings of the International Symposium on Performance Analysis of Systems and Software (ISPASS'03). pp. 123-132. Austin, TX. [22 accepted out pf 62 submissions] (35.5% acceptance rate)
      • Hu, J. S., N. Vijaykrishnan, M. J. Irwin, M. Kandemir. February 2003. Using Dynamic Branch Behavior for Power-Efficient Instruction Fetch. Proceedings of the IEEE Annual Symposium on VLSI (ISVLSI'03). pp. 127-132. Tampa, FL. [26 accepted out of 115 submissions] (22.6% acceptance rate)
      • Chen, G., M. Kandemir, N. Vijaykrishnan, M. J. Irwin. November 2002. PennBench: A Benchmark Suite for Embedded Java. Proceedings of the Fifth Annual IEEE Workshop on Workload Characterization (WWC'02). pp. 71-80. Austin, TX. (24% acceptance rate)
      • Basu, K., A. Choudhary, M. Kandemir. November 2002. Power Protocol: Reducing Power Dissipation on Off-chip Data Buses. Proceedings of the Thirty-Fifth Annual International Symposium on Microarchitecture (MICRO-35). pp. 345-355. Istanbul, Turkey. (24% acceptance rate)
      • Zhang, W., J. Hu, V. Degalahal, M. Kandemir, N. Vijaykrishnan, and M. J. Irwin. November 2002. Compiler-directed Instruction Cache Leakage Optimization. Proceedings of the Thirty-Fifth Annual International Symposium on Microarchitecture (MICRO-35). pp. 208-218. Istanbul, Turkey. (36 accepted out of 150 submissions) (24% acceptance rate)
      • Kadayif, I., A. Sivasubramaniam, M. Kandemir, G. Kandiraju, G. Chen. November 2002. Generating Physical Addresses Directly for Saving Instruction TLB Energy. Proceedings of the Thirty-Fifth Annual International Symposium on Microarchitecture (MICRO-35). pp. 185-196. Istanbul, Turkey. (36 accepted out of 150 submissions) (24% acceptance rate)
      • Unnikrishnan, P., G. Chen, M. Kandemir, D. R. Mudgett. November 2002. Dynamic Compilation for Energy Adaption. Proceedings of the International Conference on Computer Aided Design (ICCAD'02). pp. 158-163. San Jose, CA.
      • Xu, W., A. Parikh, M. Kandemir, M. J. Irwin. October 2002. Fine-grain Instruction Scheduling for Low Energy. Proceedings of the IEEE Workshop on Signal Processing Systems (SIPS'02). pp. 258-263. San Diego, CA.
      • Kandemir, M., I. Kadayif, A. Choudhary, J. Z. Zambreno. October 2002. Optimizing Inter-nest Data Locality. Proceedings of the International Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES'02). pp. 127-135. Grenoble, France.
      • Zambreno, J., M. Kandemir, A. Choudhary. October 2002. Enhancing Compiler Techniques for Memory Energy Optimizations. Proceedings of the Second Embedded Software Conference (EMSOFT'02). pp. 364-381. Grenoble, France.
      • Kim, S., N. Vijaykrishnan, M. Kandemir, M. J. Irwin. September 2002. Predictive Precharging for Bitline Leakage Energy Reduction. Proceedings of the Fifteenth Annual IEEE International ASIC/SOC Conference (ASIC/SOC'02). pp. 36-40. Rochester, NY.
      • Kandemir, M., I. Kolcu, I. Kadayif. September 2002. Experimental Evaluation of a Compiler-based Cache Energy Optimization Strategy. Proceedings of the Fifteenth Annual IEEE International ASIC/SOC Conference (ASIC/SOC'02). pp. 296-300. Rochester, NY.
      • Kadayif, I., M. Kandemir. September 2002. Instruction Compression and Encoding for Low-Power Systems. Proceedings of the Fifteenth Annual IEEE International ASIC/SOC Conference (ASIC/SOC'02). pp. 301-305. Rochester, NY.
      • Vilayannur, M., M. Kandemir, A. Sivasubramaniam. September 2002. Kernel-Level Caching for Optimizing I/O by Exploiting Inter-Application Data Sharing. Proceedings of the IEEE International Conference on Cluster Computing (CLUSTER 2002). pp. 425-432. Chicago, IL.
      • Li, L., I. Kadayif, Y-F. Tsai, N. Vijaykrishnan, M. Kandemir, M. J. Irwin, A. Sivasubramaniam. September 2002. Leakage Energy Management in Cache Hierarchies. Proceedings of the Eleventh International Conference on Parallel Architectures and Compilation Techniques (PACT 2002). pp. 131-140. Charlottesville, VA. [25 accepted out of 119 submissions] (21% acceptance rate)
      • Chen, G., M. Kandemir, N. Vijaykrishnan, M. J. Irwin, M. Wolczko. August 2002. Adaptive Garbage Collection for Battery-Operated Environments. Proceedings of the Second USENIX JavaTM Virtual Machine Research and Technology Symposium (JVM'02). pp. 1-12. San Francisco, CA. [18 accepted out of 50 submissions] (36% acceptance rate)
      • Kadayif, I., M. Kandemir, A. Choudhary. July 2002. A Hybrid Strategy Based on Data Distribution and Migration for Optimizing Memory Locality. Proceedings of the Fifteenth Workshop on Languages and Compilers for Parallel Computing (LCPC'02). pp. 1-15. College Park, MD.
      • Kadayif, I., M. Kandemir, M. Karakoy. June 2002. An Energy Saving Strategy Based on Adaptive Loop Parallelization. Proceedings of the Thirty-Ninth Design Automation Conference (DAC). pp. 195-200. New Orleans, LA. [148 accepted out of 491 submissions] (30% acceptance rate)
      • De La Luz, V., M. Kandemir, I. Kolcu. June 2002. Automatic Data Migration for Reducing Energy Consumption in Multi-bank Memory Systems. Proceedings of the Thirty-Ninth Design Automation Conference (DAC). pp. 213-218. New Orleans, LA. [148 accepted out of 491 submissions] (30% acceptance rate)
      • Kandemir, M., J. Ramanujam, A. Choudhary. June 2002. Exploiting Shared Scratch-pad Memory Space in Embedded Multiprocessor Systems. Proceedings of the Thirty-Ninth Design Automation Conference (DAC). pp. 219-224. New Orleans, LA. [148 accepted out of 491 submissions] (30% acceptance rate)
      • De La Luz, V., A. Sivasubramaniam, M. Kandemir, N. Vijaykrishnan, M. J. Irwin. June 2002. Scheduler Based DRAM Energy Management. Proceedings of the Thirty-Ninth Design Automation Conference (DAC). pp. 697-702. New Orleans, LA. [148 accepted out of 491 submissions] (30% acceptance rate)
      • Kandemir, M., A. Choudhary. June 2002. Compiler-directed Scratch Pad Memory Hierarchy Design and Management. Proceedings of the Thirty-Ninth Design Automation Conference (DAC). pp. 628-633. New Orleans, LA. [148 accepted out of 491 submissions] (30% acceptance rate)
      • Kadayif, I., M. Kandemir, U. Sezer. June 2002. An Integer Linear Programming Based Approach for Parallelizing Applications in On-chip Multiprocessors. Proceedings of the Thirty-Ninth Design Automation Conference (DAC). pp. 703-708. New Orleans, LA. [148 accepted out of 491 submissions] (30% acceptance rate)
      • Hu, J. S., M. Kandemir, N. Vijaykrishnan, M. J. Irwin, H. Saputra, W. Zhang. June 2002. Compiler-Directed Cache Polymorphism. Proceedings of the ACM SIGPLAN Joint Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES'02) and Software and Compilers for Embedded Systems (SCOPES'02). pp. 165-174. Berlin, Germany. [25 accepted out of 73 submissions] (34.2% acceptance rate)
      • Saputra, H., M. Kandemir, N. Vijaykrishnan, M. J. Irwin, J. S. Hu, C-H. Hsu, U. Kremer. June 2002. Energy-Conscious Compilation Based on Voltage Scaling. Proceedings of the ACM SIGPLAN Joint Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES'02) and Software and Compilers for Embedded Systems (SCOPES'02). pp. 2-10. Berlin, Germany. [25 accepted out of 73 submissions] (34.2% acceptance rate)
      • Chen, G., M. Kandemir, N. Vijaykrishnan, M. J. Irwin, W. Wolf. May 2002. Energy Savings Through Compression in Embedded Java Environments. Proceedings of the ACM/SIGDA/SIGSOFT Tenth International Conference on Hardware/Software Codesign (CODES '02). pp. 163-168. Estes Park, CO. [25 full papers accepted out of 75 submissions] (33% acceptance rate)
      • Kadayif, I., M. Kandemir, I. Kolcu, G. Chen. May 2002. Locality-Conscious Process Scheduling in Embedded Systems. Proceedings of the ACM/SIGDA/SIGSOFT Tenth International Conference on Hardware/Software Codesign (CODES '02). pp. 193-198. Estes Park, CO.
      • Kadayif, I., M. Kandemir, N. Vijaykrishnan, M. J. Irwin. April 2002. Hardware-Software Co-Adaption for Data-Intensive Embedded Applications. Proceedings of the IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2002). pp. 20-25. Pittsburgh, PA.
      • Sivasubramaniam, A., M. Kandemir, N. Vijaykrishnan, M. J. Irwin. April 2002. Designing Energy-Efficient Software. Proceedings of the Next Generation Software Workshop, held in conjunction with the International Parallel and Distributed Processing Symposium (IPDPS 2002). p. 176. Fort Lauderdale, FL.
      • Kandemir, M., A. Choudhary. April 2002. Compiler-directed I/O Optimization. Proceedings of the International Parallel and Distributed Processing Symposium (IPDPS 2002). p. 19. Fort Lauderdale, FL.
      • Kandemir, M. April 2002. Data Space Oriented Tiling. Proceedings of the European Symposium on Programming (ESOP'02). Spring-Verlag LNCS 2305:178-193. Grenoble, France.
      • Kandemir, M., I. Kolcu, I. Kadayif. April 2002. Influence of Loop Optimizations on Energy Consumption of Multi-bank Memory Systems. Proceedings of the International Conference on Compiler Construction (CC'02) (in conjunction with ETAPS 2002). pp. 276-292. Grenoble, France.
      • Kadayif, I., N. Orr, M. Kandemir, N. Vijaykrishnan, M. J. Irwin. March 2002. Instruction Selection/Scheduling Using an Energy-aware Instruction Set Architecture. Proceedings of the Sixth Workshop of Languages, Compilers, and Runtime Systems for Scalable Computers (LCR '02). pp. 1-10. Washington D.C.
      • Kandemir, M., I. Kolcu. March 2002. Reducing Cache Access Energy in Array-Intensive Applications. Proceedings of the International Conference on Design Automation and Test in Europe (DATE 2002). p. 1092. Paris, France.
      • Kandemir, M. March 2002. A Compiler-based Approach for Improving Intra-iteration Data Reuse. Proceedings of the International Conference on Design Automation and Test in Europe (DATE 2002). pp. 984-990. Paris, France.
      • Hu, J., N. Vijaykrishnan, M. Kandemir, M. J. Irwin. March 2002. Power-Efficient Trace Caches. Proceedings of International Conference on Design Automation and Test in Europe (DATE 2002). p. 1091. Paris, France. (44% acceptance rate)
      • Kadayif, I., M. Kandemir, N. Vijaykrishnan, M. J. Irwin, A. Sivasubramaniam. March 2002. EAC: A Compiler Framework for High-Level Energy Estimation and Optimization. Proceedings of the International Conference on Design Automation and Test in Europe (DATE 2002). pp. 436-442. Paris, France. [88 accepted as long papers out of 476 submissions] (18% acceptance rate for long papers)
      • Gurumurthi, S., A. Sivasubramaniam, M. J. Irwin, N. Vijaykrishnan, M. Kandemir, T. Li, L. K. John. February 2002. Using Complete Machine Simulation for Software Power Estimation: The SoftWatt Approach. Proceedings of the Eighth International Symposium on High-Performance Computer Architecture (HPCA-8). pp. 141-150. Cambridge, MA. [26 accepted out of 130 submissions] (20% acceptance rate)
      • Chen, G., R. Shetty, M. Kandemir, N. Vijaykrishnan, M. J. Irwin, M. Wolczko. February 2002. Tuning Garbage Collection in an Embedded Java Environment. Proceedings of the Eighth International Symposium on High-Performance Computer Architecture (HPCA-8). pp. 92-103. Cambridge, MA. [26 accepted out of 130 submissions] (20% acceptance rate)
      • Memik, G., M. Kandemir, A. Choudhary. January 2002. Exploiting Inter-file Access Patterns Using Multi-collective I/O. Proceedings of the USENIX Conference on File and Storage Technologies (FAST '02). Monterey, CA. pp. 245-258.
      • De La Luz, V., M. Kandemir, N. Vijaykrishnan, M. J. Irwin, A. Sivasubramaniam, I. Kolcu. January 2002. Compiler-Directed Array Interleaving for Reducing Energy in Multi-Bank Memories. Proceedings of the Seventh Asia and South Pacific Design Automation Conference (ASPDAC '02) and the Fifteenth International Conference on VLSI Design (VLSI Design 2002). pp. 288-293. Bangalore, India. [113 accepted out of 269 submissions] (42% acceptance rate)
      • Ramanujam, J., S. Deshpande, J. Hong, M. Kandemir. January 2002. A Heuristic for Clock Selection in High-level Synthesis. Proceedings of the Seventh Asia and South Pacific Design Automation Conference (ASPDAC '02) and the Fifteenth International Conference on VLSI Design (VLSI Design 2002). Bangalore, India. pp. 414-419.
      • Ramanujam, J., S. Krishnamurthy, J. Hong, M. Kandemir. January 2002. Address Code and Arithmetic Optimizations for Embedded Systems. Proceedings of the Seventh Asia and South Pacific Design Automation Conference (ASPDAC '02) and the Fifteenth International Conference on VLSI Design (VLSI Design 2002). Bangalore, India. pp. 619-624.
      • Crosbie, N. E., M. Kandemir, I. Kolcu, J. Ramanujam, A. Choudhary. January 2002. Strategies for Improving Data Locality in Embedded Applications. Proceedings of the Seventh Asia and South Pacific Design Automation Conference (ASPDAC '02) and the Fifteenth International Conference on VLSI Design (VLSI Design 2002). Bangalore, India. pp. 631-636.
      • Zhang, W., N. Vijaykrishnan, M. Kandemir, M. J. Irwin, D. Duarte, Y. Tsai. December 2001. Exploiting VLIW Schedule Slacks for Dynamic and Leakage Energy Reduction. Proceedings of the Thirty-Fourth Annual International Symposium on Microarchitecture (MICRO-34). pp. 102-113. Austin, TX. (29 accepted out of 144 submissions)
      • Kirubanandan, N., A. Sivasubramaniam, N. Vijaykrishnan, M. Kandemir, M. J. Irwin. December 2001. Memory Energy Characterization and Optimization for the SPEC2000 Benchmarks. Proceedings of the IEEE Fourth Annual Workshop on Workload Characterization (WWC-4) (held in conjunction with MICRO-34). pp. 193-201. Austin, TX. (~50% acceptance rate)
      • Kim, S., N. Vijaykrishnan, M. Kandemir, M. J. Irwin. November 2001. Energy-Efficient Instruction Cache Using Page-Based Placement. Proceedings of the International Conference on Compilers, Architectures and Synthesis for Embedded Systems (CASES 2001). pp. 229-237. Atlanta, GA. [25 accepted out 80 submissions] (35% acceptance rate)
      • Kandemir, M., U. Sezer, V. De La Luz. November 2001. Improving Memory Energy Using Access Pattern Classification. Proceedings of the International Conference on Computer Aided Design (ICCAD 2001). pp. 201-206. San Jose, CA.
      • Kandemir, M., I. Kadayif, U. Sezer. October 2001. Exploiting Scratch-pad Memory Using Presburger Formulas. Proceedings of the Fourteenth International Symposium on System Synthesis (ISSS '01). pp. 7-12. Montreal, Québec, Canada. [24 accepted out of 67 submissions] (35.82% acceptance rate)
      • Duarte, D., N. Vijaykrishnan, M. J. Irwin, M. Kandemir. September 2001. Evaluating the Impact of Architectural-Level Optimizations on Clock Power. Proceedings of the Fourteenth Annual IEEE International ASIC/SOC Conference. pp. 447-451. Washington, D.C.
      • Kim, H. Y., N. Vijaykrishnan, M. Kandemir, M. J. Irwin. September 2001. A Framework for Exploring Energy-Efficient VLIW Architectures. Proceedings of the International Conference on Computer Design (ICCD 2001). pp. 40-45. Austin, TX. [61 accepted out of 181 submissions] (34% acceptance rate)
      • Tomar, S., S. Kim, N. Vijaykrishnan, M. Kandemir, M. J. Irwin. September 2001. Use of Local Memory for Efficient Java Execution. Proceedings of the International Conference on Computer Design (ICCD 2001). pp. 468-473. Austin, TX. [61 accepted out of 181 submissions] (34% acceptance rate)
      • Hezavei, J., N. Vijaykrishnan, M. J. Irwin, M. Kandemir, D. Duarte. September 2001. Input Sensitive High-level Power Analysis. Proceedings of the 2001 IEEE Workshop on SiGNAL Processing Systems (SiPS '01). pp. 149-156. Antwerp, Belgium. (~70% acceptance rate)
      • An, N., A. Sivasubramaniam, N. Vijaykrishnan, M. Kandemir, M. J. Irwin, S. Gurumurthi. September 2001. Analyzing Energy Behavior of Spatial Access Methods for Memory-Resident Data. Proceedings of the Twenty-Seventh International Conference on Very Large Databases (VLDB 2001). pp. 411-420. Rome, Italy. [59 accepted out of 339 submissions] (17% acceptance rate)
      • Kadayif, I., M. Kandemir, U. Sezer. August 2001. Collective Compilation for I/O-Intensive Programs. Proceedings of the Thirteenth IASTED International Conference on Parallel and Distributed Computing and Systems (PDCS '01). pp. 21-26. Anaheim, CA.
      • Kandemir, M., J. Ramanujam, U. Sezer. August 2001. Compiler Support for Block Buffering. Proceedings of the International Symposium on Low Power Electronics and Design (ISLPED '01). pp. 76-79. Huntingdon Beach, CA.
      • Kim, S., N. Vijaykrishnan, M. Kandemir, A. Sivasubramaniam, M. J. Irwin, E. Geethanjali. August 2001. Power-aware Partitioned Cache Architectures. Proceedings of the International Symposium on Low Power Electronics and Design (ISLPED '01). pp. 64-67. Huntingdon Beach, CA. [73 accepted out of 194 submissions] (38% acceptance rate)
      • De La Luz, V., M. Kandemir, U. Sezer. July 2001. Improving Off-chip Memory Energy Behavior in a Multi-processor, Multi-bank Environment. Proceedings of the Workshop on Languages and Compilers for Parallel Computing (LCPC 2001). Springer-Verlag LNCS 2624:100-114. Cumberland Falls, KY.
      • Kadayif, I., M. Kandemir, N. Vijaykrishnan, M. J. Irwin, J. Ramanujam. June 2001. Morphable Cache Architectures: Potential Benefits. Proceedings of ACM Workshop on Languages, Compilers, and Tools for Embedded Systems (LCTES 2001). pp. 128-137. Snowbird, UT. [20 accepted out of 68 submissions] (29.4% acceptance rate)
      • Kadayif, I., T. Chinoda, M. Kandemir, N. Vijaykrishnan, M. J. Irwin, A. Sivasubramaniam. June 2001. vEC: Virtual Energy Counters. Proceedings of ACM SIGPLAN/SIGSOFT Workshop on Program Analysis for Software Tools and Engineering (PASTE '01). pp. 28-31. Snowbird, UT.
      • Kandemir, M., J. Ramanujam, M. J. Irwin, N. Vijaykrishnan, I. Kadayif, A. Parikh. June 2001. Dynamic Management of Scratch-Pad Memory Space. Proceedings of the Thirty-Eighth Design Automation Conference (DAC '01). pp. 690-695. Las Vegas, NV. [160 accepted out of 410 submissions] (39% acceptance rate)
      • Ramanujam, J., J. Hong, M. Kandemir, A. Narayan. June 2001. Reducing Memory Requirements of Nested Loops for Embedded Systems. Proceedings of the Thirty-Eighth Design Automation Conference (DAC '01). pp. 359-364. Las Vegas, NV.
      • Kandemir, M., I. Kadayif. April 2001. Compiler-directed Selection of Dynamic Memory Layouts. Proceedings of the ACM/SIGDA/SIGSOFT Ninth International Conference on Hardware/Software Codesign (CODES '01). pp. 219-224. Copenhagen, Denmark. [23 accepted out of 83 submissions] (27.7% acceptance rate)
      • Athavale, R., N. Vijaykrishnan, M. Kandemir, M. J. Irwin. April 2001. Influence of Array Allocation Mechanisms on Memory System Energy. Proceedings of the Fifteenth International Parallel and Distributed Processing Symposium (IPDPS 2001). p. 3 (full paper on CD-ROM). San Francisco, CA. [48 long papers accepted out of 276 submissions] (17% acceptance rate for long papers)
      • Parikh, A., M. Kandemir, N. Vijaykrishnan, M. J. Irwin. April 2001. VLIW Scheduling for Energy and Performance. Proceedings of IEEE Computer Society Annual Workshop on VLSI (WVLSI 2001). pp. 111-117. Orlando, FL.
      • Vijaykrishnan, N., M. Kandemir, S. Kim, S. Tomar, A. Sivasubramaniam, M. J. Irwin. April 2001. Energy Behavior of Java Applications from the Memory Perspective. Proceedings of the Java Virtual Machine Research & Technology Symposium (JVM '01). pp. 207-220. Monterey, CA. [18 accepted out of 50 submissions] (36% acceptance rate)
      • Tomar, S., N. Vijaykrishnan, M. Kandemir, R. Shetty. April 2001. Energy Optimization Using Object Co-Location in Java. JOSES: Java Optimization Strategies for Embedded Systems Workshop in conjunction with ETAPS 2001. pp. 9-15. Genova, Italy.
      • Kandemir, M. April 2001. Array Unification: A Locality Optimization Technique. Proceedings of Tenth International Conference on Compiler Construction (CC 2001), ETAPS 2001. Springer-Verlag LNCS 2027:259-273. Genova, Italy.
      • Kandemir, M. March 2001. A Dynamic Locality Optimization Algorithm for Linear Algebra Codes. Proceedings of the Sixteenth ACM Symposium on Applied Computing (SAC 2001). pp. 632-635. Las Vegas, NV.
      • Kandemir, M. January 2001. A Compiler Technique for Improving Whole Program Locality. Proceedings of the Twenty-Eighth Annual ACM Symposium on Principles of Programming Languages (POPL '01). pp. 179-192. London, UK. [24 accepted out of 126 submissions] (19% acceptance rate)
      • Shenoy, N., P. Banerjee, A. Choudhary, M. Kandemir. January 2001. Efficient Synthesis of Array Intensive computations onto FPGA Based Accelerators. Proceedings of the Fourteenth International Conference on VLSI Design 2001. pp. 305-310. Bangalore, India.
      • Duarte, N. Vijaykrishnan, M. J. Irwin, M. Kandemir. January 2001. Formulation and Validation of an Energy Dissipation Model for the Clock Generation Circuitry and Distribution Networks. Proceedings of the Fourteenth International Conference on VLSI Design 2001. pp. 248-253. Bangalore, India. (~35% acceptance rate)
      • De La Luz, V., M. Kandemir, N. Vijaykrishnan, A. Sivasubramaniam, M. J. Irwin. January 2001. DRAM Energy Management Using Software and Hardware Directed Power Mode Control. Proceedings of the Seventh International Symposium on High Performance Computer Architecture (HPCA 2001). pp. 159-169. Monterrey, Mexico. [26 accepted out of 110 submissions] (23% acceptance rate)
      • Atri, S., J. Ramanujam, M. Kandemir. December 2000. Improving Offset Assignment on Embedded Processors Using Transformations. Proceedings of the Seventh International Conference on High Performance Computing (HiPC'00). Springer-Verlag LNCS 1970:367-374. Bangalore, India.
      • Parikh, A., M. Kandemir, N. Vijaykrishnan, M. J. Irwin. December 2000. Energy-Aware Instruction Scheduling. Proceedings of the Seventh International Conference on High Performance Computing (HiPC'00). Springer-Verlag LNCS 1970:335-344. Bangalore, India. [46 accepted out of 127 submissions] (36% acceptance rate)
      • De La Luz, V., M. Kandemir, N. Vijaykrishnan, M. J. Irwin. November 2000. Energy-Oriented Compiler Optimizations for Partitioned Memory Architectures. Proceedings of the Third International Conference on Compilers, Architectures and Synthesis for Embedded Systems (CASES 2000). pp. 138-147. San Jose, CA. [25 accepted out of 56 submissions] (44% acceptance rate)
      • Kim, H. S., M. J. Irwin, N. Vijaykrishnan, M. Kandemir. October 2000. Effect of Compiler Optimizations on Memory Energy. Proceedings of the IEEE Workshop on Signal Processing Systems (SiPS '00). pp. 663-672. Lafayette, LA. [83 accepted out of 115 submissions] (72% acceptance rate)
      • Kandemir, M., J. Ramanujam. October 2000. Data Relation Vectors: A New Abstraction for Data Optimizations. Proceedings of the International Conference on Parallel Architectures and Compilation Techniques (PACT 2000). pp. 227-236. Philadelphia, PA.
      • Irwin, M. J., M. Kandemir, N. Vijaykrishnan, A. Sivasubramaniam. September 2000. A Holistic Approach to System Level Energy Optimization. Proceedings of the Tenth International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS 2000). Edited by D. Soudris, P. Pirsch, E. Barke. Springer-Verlag LNCS 1918:88-107. Göttingen, Germany. (Invited)
      • Kim, H. S., M. Kandemir, N. Vijaykrishnan, M. J. Irwin. September 2000. Characterization of Memory Energy Behavior. Proceedings of the IEEE Third Annual Workshop on Workload Characterization (WWC 2000). pp. 165-180. Austin, TX.
      • Athavale, R., N. Vijaykrishnan, M. Kandemir. September 2000. Annotation Based Energy Optimization Using Array Interleaving. Proceedings of the Second Annual Workshop on Hardware Support for Objects and Microarchitectures for Java. pp. 16-20. Austin, TX. (~70% acceptance rate)
      • Memik, G., M. Kandemir, A. Choudhary. August-September 2000. Design and Evaluation of a Compiler-Directed Collective I/O Technique. Proceedings of the Sixth Annual Euro-Par'00 Conference. Edited by Bode, A., T. Ludwig II, W. Karl, R. Wismüller. Springer-Verlag LNCS 1900:1263-1272. Munich, Germany.
      • Atri, S., J. Ramanujam, M. Kandemir. August 2000. Improving Offset Assignment for Embedded Processors. Proceedings of the Thirteenth International Workshop on Languages and Compilers for Parallel Computing (LCPC'00). Springer-Verlag, Lecture Notes in Computer Science 2017:158-172.
      • Kandemir, M., N. Vijaykrishnan, M. J. Irwin, H. S. Kim. August 2000. Experimental Evaluation of Energy Behavior of Iteration Space Tiling. Proceedings of the Thirteenth Annual Workshop on Languages and Compilers for Parallel Computing (LCPC'00). Springer-Verlag Lecture Notes in Computer Science 2017:142-157. Yorktown Heights, NY.
      • Memik, G., M. Kandemir, A. Choudhary. August 2000. Design and Evaluation of Smart Disk Architecture for DSS Commercial Workloads. Proceedings of the International Conference on Parallel Processing (ICPP '00). Toronto, Canada. pp. 335-342.
      • Esakkimuthu, G., N. Vijaykrishnan, M. Kandemir, M. J. Irwin. July 2000. Memory System Energy: Influence of Hardware-Software Optimizations. Proceedings of ISLPED'2000. pp. 244-246. Rapallo, Italy. [57 accepted out of 162 submissions] (35% acceptance rate)
      • Kandemir, M., N. Vijaykrishnan, M. J. Irwin, H. S. Kim. June 2000. Towards Energy Aware Iteration Space Tiling. Proceedings of ACM Workshop on Languages, Compilers, and Tools for Embedded Systems (LCTES 2000). LNCS 1985:211-215. Vancouver, British Columbia, Canada. [17 accepted out of 43 submissions] (40% acceptance rate)
      • Vijaykrishnan, N., M. Kandemir, M. J. Irwin, H. S. Kim, W. Ye. June 2000. Energy-Driven Integrated Hardware-Software Optimization Using SimplePower. Proceedings of the Twenty-Seventh Annual International Symposium on Computer Architecture (ISCA-2000). pp. 95-106. Vancouver, British Columbia, Canada. [29 accepted out of 166 submissions] (17% acceptance rate)
      • Ye, W., N. Vijaykrishnan, M. Kandemir, M. J. Irwin. June 2000. The Design and Use of SimplePower: A Cycle-Accurate Energy Estimation Tool. Proceedings of Thirty-Seventh Design Automation Conference (DAC'00). pp. 340-345. Los Angeles, CA. [154 accepted out of 445 submissions] (34% acceptance rate)
      • Kandemir, M., N. Vijaykrishnan, M. J. Irwin, W. Ye. June 2000. Influences of Compiler Optimizations on System Power. Proceedings of Thirty-Seventh Design Automation Conference (DAC '00). pp. 304-307. Los Angeles, CA. [154 accepted out of 445 submissions] (34% acceptance rate)
      • Kandemir, M. May 2000. A Collective I/O Scheme Based on Compiler Analysis. Proceedings of the Fifth Workshop on Languages, Compilers, and Run-Time Systems for Scalable Computers (LCR 2000). Edited by Sandhya Dwarkadas. Springer-Verlag LNCS 1915:1-15. Rochester, NY.
      • Shen, X., W. Liao, A. Choudhary, G. Memik, M. Kandemir, S. More, G. Thiruvathukal, A. Singh. May 2000. A Novel Application Development Environment for Large-Scale Scientific Computations. Proceedings of the International Conference on Supercomputing (ICS '00). pp. 274-283. Santa Fe, NM.
      • Parikh, A., M. Kandemir, N. Vijaykrishnan, M. J. Irwin. April 2000. Instruction Scheduling Based on Energy and Performance Constraints. Proceedings of the IEEE CS Annual Workshop on VLSI (WVLSI 2000). pp. 53-58. Orlando, FL.
      • Kim, H. S., N. Vijaykrishnan, M. Kandemir, M. J. Irwin. April 2000. Multiple Access Caches: Energy Implications. Proceedings of the IEEE CS Annual Workshop on VLSI (WVLSI 2000). pp. 37-42. Orlando, FL.
      • Memik, G., M. Kandemir, A. Choudhary, V. Taylor. March 2000. April: A Run-Time Library for Tape Resident Data. Proceedings of the Eighth NASA Goddard Conference on Mass Storage Systems and Technologies (held in conjunction with the Seventeenth IEEE Symposium on Mass Storage Systems). pp. 61-74. College Park, MD. (NASA Conference Publication NASA/CP-2000-209888.
      • Kandemir, M., A. Choudhary, J. Ramanujam, P. Banerjee. October 1999. On Reducing False Sharing While Improving Locality on Shared Memory Multiprocessors. Proceedings of the International Conference on Parallel Architectures and Compilation Techniques (PACT '99). pp. 203-211. Newport Beach, CA. [35 accepted out of 114 submissions] (30.7% acceptance rate)
      • Kandemir, M., A. Choudhary, J. Ramanujam. September 1999. Compiler Optimization for I/O-Intensive Computations. Proceedings of the 1999 International Conference on Parallel Processing (ICPP '99). pp. 164-171. Aizu-Wakamatsu City, Japan. (While at Northwestern/ Penn State)
      • Kandemir, M., A. Choudhary, J. Ramanujam, P. Banerjee. September 1999. A Framework for Interprocedural Locality Optimization Using Both Loop and Data Layout Transformation. Proceedings of the 1999 International Conference on Parallel Processing (ICPP '99). pp. 95-102. Aizu-Wakamatsu City, Japan.
      • Kandemir, M., A. Choudhary, J. Ramanujam. August-September 1999. An I/O-Conscious Tiling Strategy for Disk-Resident Data. Proceedings of Euro-Par'99. Springer-Verlag LNCS 1685:430-439. Toulouse, France.
      • Choudhary, A., M. Kandemir, H. Nagesh, J. No, X. Shen, V. Taylor, S. More, R. Thakur. August 1999. Data Management for Large-Scale Scientific Computations in High Performance Distributed Systems. Proceedings of the Eighth IEEE International Symposium on High Performance Distributed Computing (HPDC'99). pp. 263-272. Redondo Beach, CA.
      • Kandemir, M., P. Banerjee, A. Choudhary, J. Ramanujam, E. Ayguade. June 1999. An Integer Linear Programming Approach for Optimizing Cache Locality. Proceedings of the 1999 ACM International Conference on Supercomputing (ICS'99) pp. 500-509. Rhodes, Greece. [57 accepted out of 180 submissions] (31.6% acceptance rate)
      • Choudhary, A., M. Kandemir. April 1999. System-Level Meta-Data for High Performance Data Management. Proceedings of the Third IEEE Meta-Data Conference. Electronic publication. Bethesda, Maryland.
      • Kandemir, M., A. Choudhary, J. Ramanujam, P. Banerjee. April 1999. A Graph Based Framework to Detect Optimal Memory Layouts for Improving Data Locality. Proceedings of the 1999 International Parallel Processing Symposium (IPPS'99). pp. 738-743. San Juan, Puerto Rico.
      • Kandemir, M., A. Choudhary, J. Ramanujam, P. Banerjee. March 1999. Improving Locality using a Graph-Based Technique for Detecting Memory Layouts of Arrays. Proceedings of the Ninth SIAM Conference on Parallel Processing for Scientific Computing (Poster Session). CD-Rom. San Antonio, Texas.
      • Kandemir, M., J. Ramanujam, A. Choudhary, P. Banerjee. 1999. A Loop Transformation Algorithm Based on Explicit Data Layout Representation for Optimizing Locality. Proceedings of Languages and Compilers for Parallel Computing (LCPC'98). Edited by S. Chatterjee et al. Springer-Verlag LNCS 1656:34-50.
      • Kandemir, M., A. Choudhary, J. Ramanujam, P. Banerjee. December 1998. Improving Locality Using Loop and Data Transformations in an Integrated Framework. Proceedings of the 31st International Symposium on Microarchitecture (MICRO-31). pp. 285-296. Dallas, TX. [28 accepted out of 108 submissions] (25.9% acceptance rate)
      • Kandemir, M., A. Choudhary, J. Ramanujam, P. Banerjee. October 1998. Improving Locality Using Loop and Data Transformations in an Integrated Framework. Proceedings of the Third Workshop Interaction Between Compilers and Computer Architectures (INTERACT), in conjunction with ASPLOS VIII. pp. 1-10. San Jose, CA.
      • Kandemir, M., A. Choudhary, J. Ramanujam, P. Banerjee. October 1998. A Matrix-Based Approach to the Global Locality Optimization Problem. Proceedings of the International Conference on Parallel Architectures and Compilation Techniques (PACT '98). pp. 306-313. Paris, France. [22 accepted out of 164 submissions] (13.4% acceptance rate for regular papers)
      • Kandemir, M., A. Choudhary, J. Ramanujam, N. Shenoy, P. Banerjee. September 1998. Enhancing Spatial Locality using Data Layout Optimizations. Proceedings of Euro-Par'98 (Workshop on Automatic Parallelization). Springer-Verlag LNCS 1470:422-434. Southampton, UK.
      • Kandaswamy, M., M. Kandemir, A. Choudhary, D. Bernholdt. August 1998. Performance Implications of Architectural and Software Techniques on I/O-Intensive Applications. Proceedings of the 1998 International Conference on Parallel Processing (ICPP'98). pp. 493-500. Minneapolis, MN.
      • Kandemir, M., N. Shenoy, P. Banerjee, J. Ramanujam, A. Choudhary. August 1998. Minimizing Data and Synchronization Costs in One-Way Communication. Proceedings of the 1998 International Conference on Parallel Processing (ICPP'98). pp. 180-188. Minneapolis, MN.
      • Kandemir, M., A. Choudhary, N. Shenoy, P. Banerjee, J. Ramanujam. July 1998. A Hyperplane Based Approach for Optimizing Spatial Locality in Loop Nests. Proceedings of the 1998 ACM International Conference on Supercomputing (ICS'98). pp. 69-76. Melbourne, Australia.
      • Kandemir, M., A. Choudhary, J. Ramanujam. May 1998. Improving Locality in Out-of-Core Computations using Data Layout Transformations. Proceedings of the Fourth Workshop on Languages, Compilers, and Run-Time Systems for Scalable Computers (LCR'98). pp. 359-366. Pittsburgh, PA.
      • Kandemir, M., P. Banerjee, A. Choudhary, J. Ramanujam, N. Shenoy. April 1998. A Generalized Framework for Global Communication Optimization. Proceedings of the 1998 International Parallel Processing Symposium (IPPS'98). pp. 69-73. Orlando, FL.
      • Kandemir, M., M. Kandaswamy, A. Choudhary. December 1997. Global I/O Optimizations for Out-of-Core Computation. Proceedings of the High-Performance Computing Conference (HiPC'97). pp. 401-406. Bangalore, India.
      • Kandaswamy, M., M. Kandemir, A. Choudhary, D. Bernholdt. November 1997. Optimization and Evaluation of Hartree-Fock Application's I/O with PASSION. Proceedings of SC'97 Conference (formerly known as Supercomputing). CD-Rom. San Jose, CA.
      • Kandemir, M., J. Ramanujam, A. Choudhary. November 1997. Compiler Algorithms for Optimizing Locality and Parallelism on Shared and Distributed Memory Machines. Proceedings of the 1997 International Conference on Parallel Architectures and Compilation Techniques (PACT'97). pp. 236-247. San Francisco, CA.
      • Kandemir, M., A. Choudhary, J. Ramanujam, M. Kandaswamy. November 1997. A Unified Compiler Algorithm for Optimizing Locality, Parallelism and Communication in Out-of-Core Computations. Proceedings of ACM Workshop on I/O in Parallel and Distributed Systems (IOPADS '97), co-located with SC '97. pp. 79-92. San Jose, CA.
      • Kandemir, M., J. Ramanujam, A. Choudhary. Improving the Performance of Out-of-Core Computations. August 1997. Proceedings of the 1997 International Conference on Parallel Processing (ICPP'97). pp. 128-136. Bloomingdale, IL.
      • Kandemir, M., J. Ramanujam, A. Choudhary. August 1997. Optimizing Out-of-Core Computations using Chain Vectors. Proc. Euro-Par'97. Springer-Verlag LNCS 1300:601-608. Passau, Germany.
      • Kandemir, M., J. Ramanujam, A. Choudhary. July 1997. A Compiler Algorithm for Optimizing Locality in Loop Nests. Proceedings of Eleventh ACM International Conference in Supercomputing (ICS'97). pp. 269-276. Vienna, Austria.
      • Kandemir, M., R. Bordawekar, A. Choudhary. April 1997. Data Access Re-organizations in Compiling Out-of-Core Data Parallel Programs on Distributed Memory Machines. Proceedings of the International Parallel Processing Symposium (IPPS'97). pp. 559-564. Geneva, Switzerland.
      • Kandemir, M., A. Choudhary, R. Bordawekar. March 1997. Compiling Out-of-Core Programs on Distributed-Memory Machines. Proceedings of Eight SIAM Conference on Parallel Processing for Scientific Computing (PP97). Cd-Rom. Minneapolis, MN.
      • Kandemir, M., A. Choudhary, J. Ramanujam, R. Bordawekar. February 1997. Optimizing Out-of-Core Computations in Uniprocessors. Proceedings of the Workshop on Interaction between Compilers and Computer Architectures. pp. 1-10. San Antonio, TX.