The Microsystems Design Laboratory
The Microsystems Design Lab is a research group at The Pennsylvania State University in the Department of Computer Science and Engineering. MDL research focuses on specific architectural and system-based research fields, ranging from the design of thermal and power aware circuits and systems, reliable systems, and embedded systems to nanotechnology. Research projects are supported by the
National Science Foundation, the
MARCO FCRP Gigascale Systems Research Center, DARPA, the
Pennsylvania Technology Collaborative, Microsoft Research, Honda, and Toyota.
This site is a "wiki," a user-maintained collaboration platform that is a portal into the MDL's web presence.
Page Navigation
Faculty and Student Researchers
(edit table)
Link
MDL.Offices for office and machine assignments
Link
MDL.Sp08Group for Spring 2008 Group Meeting Schedule
Link
MDL.Su08Group for Summer 2008 Group Meeting Schedule
Link
MDL.Fa08Group for Fall 2008 Group Meeting Schedule
Recent Publications
Almost all of the papers listed below can be found on-line in either the ACMDL (
http://portal.acm.org/portal.cfm) or IEEEXplore (
http://ieeexplore.ieee.org/Xplore/guesthome.jsp). If you are unable to obtain a copy of a paper from the copyright holder, please contact one of the authors directly.
Note to students/authors: Because all publications posted on our servers must meet the appropriate IEEE/ACM copyright guidelines, we have developed a 'simple' means of adding the appropriate copyright notices to your work. Please see
IncludingCopyright for more information.
Temperature and Power Aware Systems
Highlighted papers include
- W. Zhang, J. Hu, V. Degalahal, M. Kandemir, N. Vijaykrishnan, M. J. Irwin, Reducing Instruction Cache Energy Consumption using a Compiler-Based Strategy, ACM Trans. on Architecture and Code Optimization, 1(1):3-33, Mar. 2004. First paper in inaugural issue of TACO.
- Mosin Mondal, Andrew J. Ricketts, Sami Kirolos, Tamer Ragheb, Greg Link, Vijaykrishnan Narayanan and Yehia Massoud , “Mitigating Thermal Effects on Clock Skew with Dynamically Adaptive Drivers,” Proc. of the IEEE Symposium on Quality Electronic Design, ISQED, 2007. (Funded by NSF CARRER 0448558, NSF 0093085 and MARCO/GSRC)
- Mosin Mondal, Andrew J. Ricketts, Sami Kirolos, Tamer Ragheb, Greg Link, Vijaykrishnan Narayanan and Yehia Massoud, “Thermally Robust Clocking Schemes for 3D Integrated Circuits,” Proc. of the IEEE Design Automation and Test in Europe, DATE, 2007. (Funded by NSF CARRER 0448558, NSF 0093085 and MARCO/GSRC)
- J. Kim, C.A. Nicopoulos, D. Park, R. Das, Y. Xie, N. Vijaykrishnan, and C.R. Das, A Novel Dimensionally-Decomposed Router for On-Chip Communication in 3D Architectures, to appear in Proceedings of the 34th Annual International Symposium on Computer Architecture (ISCA), June 2007. (Funded by NSF grants CCR-0208734, EIA-0202007, CCF-0429631, CNS-0509251, CRI-0454123, CAREER 0093085, SRC grant 00541, and a grant from DARPA/MARCO GSRC)
- 2008 for papers that appeared in 2008 or are to appear
- 2007 for papers that appeared in 2007
- 2006 for papers that appeared in 2006
- 2005 for papers that appeared in 2005
- 2004 for papers that appeared in 2004
- 2003 for papers that appeared in 2003
- 2002 for papers that appeared in 2002
- 2001 for papers that appeared in 2001
- 2000 for papers that appeared in 2000
- 1999 for papers that appeared in 1999 and earlier
Reliable Circuits and Systems
Highlighted papers include
- N.Soundararajan, Aditya Yanamandra, C.A. Nicopolous, N. Vijaykrishnan, Anand Sivasubramaniam and Mary Jane Irwin. "Analysis and Solutions to Issue Queue Process Variation," International Conference on Dependable Systems and Networks(DSN), June 2008
- Feng Wang, Xiaoxia Wu and Yuan Xie. "Variability-Driven Module Selection with Joint Design Time Optimization and Post-Silicon Tuning". To appear in Proceedings of Asia-South Pacific Design Automation Conference (ASP-DAC), Jan. 2008. Best Paper Award selected from 350 submissions.
- Andrew J. Ricketts, Madhu Mutyam, N. Vijaykrishnan, Mary Jane Irwin, “Investigating Simple Low Latency Reliable Multiported Register Files,” Proc. Of the IEEE Symposium on VLSI, 2007. (Funded by MARCO/DARPA and NSF 0093085)
- 2008 for papers that appeared in 2008 or are to appear
- 2007 for papers that appeared in 2007
- 2006 for papers that appeared in 2006
- 2005 for papers that appeared in 2005
- 2004 for papers that appeared in 2004
- 2003 for papers that appeared in 2003
Embedded and Application Specific Systems
Highlighted papers include
- 2008 for papers that appeared in 2008 or are to appear
- 2007 for papers that appeared in 2007
- 2006 for papers that appeared in 2006
- 2005 for papers that appeared in 2005
- 2004 for papers that appeared in 2004
- 2003 for papers that appeared in 2003
Emerging Technology (Nanotechnologies) Systems
Highlighted papers include
- P. Mangalagiri, K. Sarpatwari, Aditya Yanamandra, N. Vijaykrishnan, O. Awadelkarim, Yuan Xie and Mary Jane Irwin. "A Low-Power Phase Change Memory Based Hybrid Cache Architecture," GLSVLSI'08 (short paper), May 2008
- S. Eachempati, Arthur Nieuwoudt, N. Vijaykrishnan, Y. Massoud, Impact of Process Variations on Carbon Nanotube Bundle Interconnect for Future FPGA Architectures, Proc. of ISVLSI'07, May. 2007.
- S. Eachempati, Arthur Nieuwoudt, A. Gayasen, N. Vijaykrishnan, Y. Massoud, Assessing Carbon Nanotube Bundle Interconnect for Future FPGA Architectures, Proc. of DATE'07, Apr. 2007.
- 2008 for papers that appeared in 2008 or are to appear
- 2007 for papers that appeared in 2007
- 2006 for papers that appeared in 2006
- 2005 for papers that appeared in 2005
- 2004 for papers that appeared in 2004
(edit list)
Software
(edit list)
Wiki Navigation
If you are new to this site or to the concept of a wiki, please read
WelcomeGuest, which introduces the concept and will ease your transition. Our sincere hope is that you shouldn't need to read the welcome page to browse the site, but it will help explain some idiosyncracies of the wiki experience.
Please also see
TWikiNavigation for helpful links that are good for new users.
to top