CMPEN 411   VLSI Digital Circuits
Fall 2016

Instructor: Kyusun Choi

Teaching Assistant: Sumitha George

Laboratory:

Textbook:

Reference Book:

CMPEN 411 Web Page:   Course Project: Exams:
Exam I Sep. 22, 2016, 8:15pm - 9:50pm, at Room ?? Willard Building
Exam II Oct. 27, 2016, 8:15pm - 9:50pm, at Room ?? Willard Building
Final Exam Date, time, and place to be announced, elion
 
Homework/Project: Pop Quiz: Grading:
 
Homework/Project  40%
Exam 1  15%
Exam 2  15%
Final 20%
Quiz 10%


Course Objectives: Tentative Course Outline:
Lecture #             Topic (textbook reading)


1   Introduction (ch 1.1 - 1.2)
2   Design metrics (ch 1.3)
3   The MOS transistor (ch 3.1 - 3.3.2)
4   The CMOS inverter - a static view (ch 5.1 - 5.3)
5   IC manufacturing; design rules (ch 2.1 - 2.3)
6   Static CMOS logic (ch 6.1 - 6.2.1)
7   Pass transistor logic (ch 6.2.3)
8   Capacitance effects (ch 3.3.3 - 3.3.4)
9   Resistance effects and wire models (ch 4.1 - 4.5.2)
10  The CMOS inverter - a dynamic view (ch 5.4.1 - 5.4.2)
11  Designing fast logic (ch 5.4.3; 9.2.2; 9.3.3)
12  Designing energy efficient logic (ch 5.5)
13  Designing energy efficient logic 2 (ch 5.5)
14  Dynamic CMOS logic (ch 6.3 - 6.4)
15  Dynamic CMOS logic (ch 6.3 - 6.4)
16  Timing metrics; static sequential circuits (ch 7.1 - 7.2)
17  Dynamic sequential circuits (ch 7.3; 7.5)
18  Timing issues; datapath design (ch 7.7; 10.1 - 10.3.3; 11.1 - 11.2)
19  Adders (ch 11.3)
20  Multipliers (ch 11.4)
21  Shifters, big decoders, big multiplexors (ch 11.5 - 11.6)
22  Semiconductor memories; ROM cores (ch 12.1 - 12.2.1)
23  SRAM, DRAM, and CAM cores (ch 12.2.2 - 12.2.4)
24  Peripheral memory circuitry (ch 12.3)
25  Power (ch 11.7; 12.5)
26  Design flow (ch 9.1 - 9.3)
27  Technology trends
28  Emerging technology