Jing Xie


Ph.D. Candidate
Department of Computer Science & Engineering
Pennsylvania State University
Office: 354B IST Building
Email:
Telephone(o): 814-863-7325
I am now a third year Ph.D. candidate in Department of Computer Science and Engineering, Penn State University. I'm a member of MDL group in PSU, my advisor is Professor Yuan Xie. My research interests are computer architecture and EDA tools for three dimensional (3D) IC design and test methodology, and novel non-volatile memories architecture.

Prior to Penn State, I received my bachelor degree from Peking University and my master degree from North Carolina State University .

My CV is here.


Education

2009 - present Ph.D., Department of Computer Science and Engineering, Pennsylvania State University
2007 - 2008 M.S., Department of Electrical and Computer Engineering, North Carolina State University
2001 - 2005 B.S., Department of Microelectronics, Peking University

Teaching


Publications

Conference
  • Jing Xie, Yuan Xie, Yield-Aware Time-Efficient Testing and Self-fixing Design For TSV-Based 3D ICs. In Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC), 2012.
  • Jing Xie, Tao Zhang, Matt Poremba, Yuan Xie, A 3D SoC Design With On-Chip DRAM Stacking. In University Booth of Design Automation Conference (DAC), 2011.
  • Jin Ouyang, Jing Xie, Matthew Poremba, Yuan Xie, Evaluation of TSV-free 3D Network-on-Chip. In Proceedings of SRC Technical Conference (TECHCON), 2011.
  • Jing Xie, Jin Ouyang, Yuan Xie, Mitigating Electromigration in Power Supply Network. In Workshop on Diversity in Design Automation and Test (WD^2AT), 2011.
  • Jing Xie, Xiangyu Dong, Yuan Xie, 3D Memory Stacking for Fast Checkpointing/Restore Applications. In Proceedings of IEEE International 3D Systems Integration Conference (3DIC), 2010.
  • Tao Zhang, Jing Xie, Yuan Xie, 3D SoC Design for H.264 Application With On-Chip DRAM Stacking. In Proceedings of IEEE International 3D Systems Integration Conference (3DIC), 2010.
  • Jing Xie, Jishen Zhao, Yuan Xie, Architectural Benefits and Design Challenges for Three-dimensional Integrated Circuits. In Proceedings of IEEE biennial Asia Pacific Conference on Circuits and Systems (APCCAS), 2010.
  • Jin Ouyang, Jing Xie, Matthew Poremba, Yuan Xie, Evaluation of Using Inductive/Capacitive-Coupling Vertical Inter-connects in 3D Network-on-Chip. In Proceedings of the International Conference on Computer-Aided Design (ICCAD), 2010.

Awards and Honors

2011 Travel Grant for University Booth DAC 2011
2010 Best Teaching Assistant Reward
2010 Young Student Support Program Awards for DAC 2010

Courses

  • CMPSC497B Machine Learning

  • CMPSC465 Data Structure and Algorithm

  • CMPSC443 Introduction of Computer Security

  • CSE 532 Multiprocessor Architecture

  • CSE578 CAD Tools

  • CSE514 Computer Networks

  • CSE530 Fundamentals of Computer Architecture

  • CSE539 Topics in Computer Architecture

  • CSE517 Performance Evaluation


 Last modified: Oct 2, 2011