Jishen Zhao

Ph.D. Candidate
Department of Computer Science & Engineering
Pennsylvania State University
Office:	354B IST Building
Email:
Telephone(o):	814-863-7325

Prior to Penn State, I received my bachelor's and master's degrees from Zhejiang University in China. I was a member of ZjuNlict RoboCup Team.

My Curriculum Vitae is available here.

Education

Teaching

• CMPEN 417 Digital Design Using Field Programmable Devices, Fall 2009

Publications

• Xiangyu Dong, Jishen Zhao, Yuan Xie, Fabrication Cost Analysis and Cost-Aware Design Space Exploration for 3D ICs. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), Vol. 29. No. 12, pp.1959-1972, Dec. 2010.

• Sheng Li, Doe Hyun Yoon, Ke Chen, Jishen Zhao, Jung Ho Ahn, Jay B. Brockman, Norman P. Jouppi, Yuan Xie, MAGE: adaptive granularity and ECC for resilient and power efficient memory systems. To appear at the International Conference for High Performance Computing, Networking, Storage, and Analysis (SC), 2012.
• Jishen Zhao and Yuan Xie, Optimizing Bandwidth and Power of Graphics Memory with Hybrid Memory Technologies and Adaptive Data Migration. To appear at the International Conference on Computer-Aided Design (ICCAD), 2012. (24% acceptance rate.)[pdf]
• Jishen Zhao, Guangyu Sun, Gabriel H. Loh, Yuan Xie, Energy-efficient GPU Design with Reconfigurable In-package Graphics Memory. To appear at the International Symposium on Low Power Electronics and Design (ISLPED), 2012. [pdf]
• Jishen Zhao, Cong Xu, Yuan Xie, Bandwidth-Aware Reconfigurable Cache Design with Hybrid Memory Technologies. In Proceedings of the International Conference on Computer-Aided Design (ICCAD), 2011. [pdf]
• Guangyu Sun, Christopher Hughes, Changkyu Kim, Jishen Zhao, Cong Xu, Yuan Xie, Yen-Kuang Chen, Moguls: a Model to Explore Memory Hierarchy for Throughput Computing. In Proceedings of the International Symposium on Computer Architecture (ISCA), 2011.
• Jishen Zhao, Xiangyu Dong, Yuan Xie, An Energy-Efficient 3D CMP Design with Fine-Grained Voltage Scaling. In Proceedings of the IEEE/ACM Design, Automation, and Test in Europe (DATE) Conference, 2011. [pdf]
• Jing Xie, Jishen Zhao, Yuan Xie, Architectural Benefits and Design Challenges for Three-dimensional Integrated Circuits. In Proceedings of IEEE biennial Asia Pacific Conference on Circuits and Systems (APCCAS), 2010.
• Yibo Chen, Jishen Zhao, Yuan Xie, 3D-NonFAR: Three-Dimensional Non-Volatile FPGA Architecture Using Phase Change Memory. In Proceedings of ACM/IEEE International Symposium on Low Power Electronics and Design (ISLPED), 2010. (25% acceptance rate.)[pdf]
• Jishen Zhao, Xiangyu Dong, Yuan Xie, Cost-Aware Three-Dimensional (3D) Many-Core Multiprocessor Design. In Proceedings of IEEE Design Automation Conference (DAC), 2010. (24% acceptance rate.)[pdf]

Awards and Honors

Presentations

• Bandwidth-Aware Reconfigurable Cache Hierarchy Design with Hybrid Memory Technologies, WD²AT 2011, May 2011.
• Reconfigurable Energy-Efficient 3D Stacked Chip-Multiprocessor Design, TECHCON 2010, September 2010.

Courses

• CSE530 Fundamentals of Computer Architecture

• CSE539 Topics in Computer Architecture

• CSE517 Performance Evaluation

• CSE578 CAD Tools

• CMPSE431 Computer Architecture

• CMPEN411 Digital Integrated Circuits