Journal
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| HiPEAC |
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G. Chen and M. Kandemir. An approach for enhancing inter-processor
data locality on
chip multiprocessors. To appear in HiPEAC Transactions on High-Performance
Embedded Architectures and Compilers: Special Issue on Future
Directions in Embedded Systems Compilation. |
| ACM
TECS |
|
G. Chen, M. Kandemir, M. J.
Irwin, and J. Ramanujam. Reducing
code size through address register assignment. In ACM Transactions on Embedded Computing
Systems, 5(1):225-258, February 2006. |
| IEEE
TVLSI |
|
M. Kandemir, M. J. Irwin, G. Chen, I. Kolcu. Compiler-Guided Leakage Optimization for
Banked Scratch-Pad Memories. In IEEE Transactions on Very Large Scale
Integration (VLSI) Systems, 13(10):1136-1146, October 2005. |
IEEE
TPDS
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I. Kadayif, M. Kandemir, G. Chen, O. Ozturk, M. Karakoy,
and U. Sezer. Optimizing
Array-Intensive Application for On-Chip Multiprocessors. In IEEE Transactions on Parallel and
Distributed Systems, 16(5):396-411, May 2005.
|
ACM
TODAES
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I. Kadayif, A. Sivasubramaniam,
M. Kandemir, G. Kandiraju, G. Chen, and G.
Chen. Optimizing
Instruction TLB Energy Using Software and Hardware Techniques. In ACM
Transactions on Design Automation of Electronic Systems,
10(2):229-257, April 2005. |
Conference
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| DSN'06 |
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G. Chen, M. Kandemir, and I.
Kolcu. Memory-conscious reliable
execution on embedded chip multiprocessors. In Proc. the International
Conference on Dependable Systems and Networks, pp. 13-22,
Philadelphia, Pennsylvania,
June 2006. |
| ASPDAC'06 |
|
G. Chen, M. Kandemir, and F.
Li. Energy-aware computation
duplication for improving reliability in embedded chip multiprocessors.
In Proc. the 11th
Asia and South Pacific Design Automation Conference, pp.
134-139, Yokohama
City, Japan, January 2006. |
ASPDAC'06
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G. Chen, G. Chen,
M. Kandemir, N. Vijaykrishnan, and M. J. Irwin. Object
duplication for improving reliability. In Proc. the 11th
Asia and South Pacific Design Automation Conference, pp.
140-145, Yokohama
City, Japan, January 2006. |
| ICCAD'05 |
|
G. Chen and M. Kandemir. Runtime integrity checking for inter-object
connections. In Proc. International
Conference on Computer Aided Design, pp. 303-306, San Jose,
California, November
2005. |
ICCAD'05
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G. Chen and M. Kandemir. Code restructuring for improving cache
performance of MPSoCs. In Proc. International
Conference on Computer Aided Design, pp. 271-274, San Jose,
California, November
2005.
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ICCD'05
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S. H. K. Narayanan, G. Chen, M. Kandemir, and Y.
Xie. Temperature-sensitive loop
parallelization
for chip multiprocessors. In Proc. IEEE International
Conference on Computer Design, pp. 677-682, San Jose, California,
October 2005.
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EMSOFT'05
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G. Chen and M. Kandemir. Optimizing inter-processor data locality
on embedded chip multiprocessors. In Proc. ACM International Conference on
Embedded Software, pp. 227-236, Jersey City, New Jersey,
September 2005.
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SAS'05
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G. Chen, M. Kandemir, and M.
Karakoy. Memory space conscious loop
iteration duplication for reliable execution. In Proc. the 12th International
Static Analysis Symposium, pp. 52-69, London, UK, September 2005.
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DSN'05
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G. Chen, M. Kandemir, and M.
Karakoy. A data-centric approach to
checksum reuse for array-intensive applications. In Proc. the International
Conference on Dependable Systems and Networks, pp. 316-325,
Yokohama, Japan,
June 28 - July 1, 2005.
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CGO'05
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G. Chen and M. Kandemir. Optimizing address code generation for
array-intensive DSP applications. In Proc. International Symposium on Code
Generation and Optimization, pp. 141-152, San Jose, California,
March 2005.
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CODES/ISSS'04
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G. Chen,
M. Kandemir, N.
Vijaykrishnan, A. Sivasubramaniam, and M. J. Irwin. Analyzing
object error behavior
in embedded JVM environments. In Proc. the IEEE/ACM/IFIP
International Conference on Hardware/Software Codesign and System
Synthesis, pp. 230-235, Stockholm, Sweden, September
2004. (PDF) |
CODES/ISSS'04
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M. Kandemir, I. Kadayif, and G. Chen. Compiler-directed code
restructuring for reducing data TLB energy.
In Proc. the IEEE/ACM/IFIP International Conference on
Hardware/Software Codesign and System Synthesis,
pp. 98-103, Stockholm, Sweden, September 2004. (PDF) |
SOCC'03
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G. Chen,
G. Chen, M.
Kandemir, N. Vijaykrishnan, M. J. Irwin. Energy-aware code cache
management for memory-constrained Java devices. In Proc. IEEE
International SOC Conference, pp. 179-182, Portland,
Oregon, September 2003. (PDF) |
SOCC'03
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A. Nadgir, M. Kandemir and G. Chen. An access pattern based energy
management strategy for instruction caches. In Proc. IEEE
International SOC Conference, pp. 175-178, Portland, Oregon,
September
2003. (PDF) |
CC'03
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M. Kandemir, M. J. Irwin, G. Chen,
J. Ramanujam. Address register assignment for reducing code size.
In Proc. 12th International Conference on Compiler Construction,
pp. 273-289, Warsaw, Poland, April 2003. (PDF) |
Workshop
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HP-PAC'05
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G. Chen, K. Malkowski, M.
Kandemir, and P. Raghavan. Reducing
power with performance constraints for parallel sparse applications.
In Proc. High-Performance,
Power-Aware Computing Workshop, Denver, Colorado, April 2005.
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LCPC'04
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G. Chen and M. Kandemir. An ILP-based approach to locality
optimization. In Proc.
Workshop on Languages and Compilers for Parallel Computing, West
Lafayette, Indiana, September 2004.
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LCPC'03
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G. Chen,
G. Chen, M. Kandemir, A. Nadgir. Compiler-based code partitioning
for intelligent embedded disk processing. In Proc. the 16th
International Workshop on Languages and Compilers for Parallel Computing,
pp. 451-465, College Station, Texas, October 2003. |
Under Review
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G. Chen and M. Kandemir. Compiler-Directed Code Restructuring for
Improving Performance of MPSoCs. Submitted to TPDS.
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G. Chen, M. Kandemir, and M.
Karakoy. Memory-Conscious Reliability
Enhancement for Array-Based Embedded Applications. Submitted to
TODAES.
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G. Chen, G. Chen, M. Kandemir,
N. Vijaykrishnan, and M. J. Irwin. Improving
Object Reliability in Embedded Java. Submitted to TCAD.
|
cse.psu.edu