Guangyu Sun

 

Ph.D. Candidate
Advisor: Dr. Yuan Xie (Associate Professor)
Department of Computer Science & Engineering
Pennsylviania State University

Phone: +1-814-865-6168
Office: 354B IST
Email: g s u n [at] cse [dot] psu [dot] edu

http://www.cse.psu.edu/~gsun/











Curriculum Vitae

 

 

Research Interest | Education | Publications

Research Interest
  • Computer Architecture
    • Memory Systems
    • Non-volatile Memories
    • Three Dimension (3D) Architecture
    • Process variations aware Architecture
  • VLSI Design
    • 3D VLSI Designs
    • Process variations aware designs
  • CAD Tools

Education

Publications

· [1]   Guangyu Sun, Yongsoo Joo, Yibo Chen, Yuan Xie, Yiran Chen, Hai Li, "A Hybrid Solid-State Storage Architecture for the Performance, Energy Consumption, and Lifetime Improvement." to appear at HPCA, Jan. 2010.

· [2]   Jin Ouyang, Guangyu Sun, Yibo Chen, Lian Duan, Tao Zhang, Yuan Xie, Mary Jane Irwin, "Arithmetic Unit Design Using 180nm TSV-based 3D Stacking." 3DSiC, Oct. 2009.

· [3]   Ahmed Al Maashri, Guangyu Sun, Xiangyu Dong, Vijay Narayanan, and Yuan Xie, "3D GPU Architecture using Cache Stacking: Performance, Cost, Power and Thermal Analysis." ICCD, Oct. 2009.

· [4]   Guangyu Sun, Xiaoxia Wu, and Yuan Xie, "Exploration of 3D Stacked L2 Cache Design for High Performance and Efficient Thermal Control." ISLPED, Aug. 2009.

· [5]   Yiran Chen, Hai Li, Cheng-Kok Koh, Kaushik Roy, Jing Li, Guangyu Sun, "Variable-Latency Adder (VL-Adder) Designs for Low Power and NBTI Tolerance." TVLSI, 2009.

· [6]   Guangyu Sun, Xiangyu Dong, Yuan Xie, Jian Li, Yiran Chen, "A Novel Architecture of the 3D Stacked MRAM L2 Cache for CMPs." HPCA, Feb. 2009.

· [7]  Srinath Sridharan, Mike Debole, Guangyu Sun, Yuan Xie, Vijaykrishnan Narayanan, “A Criticality-Driven Microarchitectural Three Dimensional (3D) Floorplanner.” ASP-DAC, Jan. 2009.

· [8]  Xiangyu Dong, Xiaoxia Wu, Guangyu Sun, Helen Li, Yiran Chen, Yuan Xie, “Circuit and Mircoarchitecture Evaluation of 3D Stacking Magnetic RAM (MRAM) as a Universal Memory Replacement.” DAC08, July. 2008.

· [9]  Hai Lin, Guangyu Sun, Yunsi Fei, Yuan Xie, Anand Sivasubramaniam, “Thermal-aware design considerations for application-specific instruction set processor.” SASP08, June. 2008.

· [10]  Feng Wang, Guangyu Sun, Yuan Xie, “A Variation Aware High Level Synthesis Framework.” DATE, Mar. 2008.

· [11]  Guangyu Sun, Yi Xu, Zhiqiang Gao, “A Watermarking System for IP Protection by Buffer Insertion Technique.” ISQED, Mar. 2006.

· [12]  Guangyu Sun, Zhiqiang Gao, Min Ni, “A Hierarchy Watermarking Technique for IP Core Protection.” ASICON, Oct. 2005.

 

- Guangyu Sun -

 

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Last Update: Oct/01/2009