[1] Studying energy tradeoffs in off-loading computation/compilation in Java-enabled mobile devices. G. Chen, B. Kang, M. Kandemir, N. Vijaykrishnan, M. J. Irwin, and R. Chandramouli. IEEE Transactions on Parallel and Distributed Systems (TPDS), Vol 15, No. 9, pp. 795-809, Sept 2004.
[2] Using memory compression for energy reduction in an embedded Java system. G. Chen, M. Kandemir, N. Vijaykrishnan, M. J. Irwin and W. Wolf. In Journal of Circuits, Systems and Computers, Volume 11, No. 5 (2002) 537-555.
[3] Influence of garbage collection on memory system energy, by G. Chen, R. Shetty, M. Kandemir, N. Vijaykrishnan, M. J. Irwin, and M. Wolczko. In ACM Transactions on Embedded Computing Systems (TECS), November 2002, Volume 1, Issue 1.
[4] Object duplication for improving reliability, by G. Chen, G. Chen, M. Kandemir, N. Vijaykrishnan, and M. J. Irwin. In Proc. 11th Asia and South Pacific Design Automation Conference (ASP-DAC’06), Yokohama City, Japan, January 2006.
[5] Verifiable annotations for embedded Java environments, by G. Chen and M. Kandemir, In Proc. International Conference on Compilers, Architectures and Synthesis of Embedded Systems (CASES’05), San Francisco, CA, September 2005.
[6] Exploiting frequent field values in Java objects for reducing heap memory requirements, by G. Chen, M. Kandemir, and M. J. Irwin. In Proc. the First ACM/USENIX Conference on Virtual Execution Environments (VEE'05), Chicago, Illinois, June 2005.
[7] Improving Java virtual machine reliability for memory-constrained embedded systems, by G. Chen and M. Kandemir. In Proc. Design Automation Conference (DAC'05), Anaheim, CA, June 2005.
[8] Field-level analysis for heap space optimization in embedded Java, by G. Chen, M. Kandemir, N. Vijaykrishnan, and M. J. Irwin. In Proc. International Symposium on Memory Management (ISMM'04), Vancouver, British Columbia, Canada, October 2004.
[9] Code protection for resource-constrained embedded devices, by H. Saputra, G. Chen, R. Brooks, N. Vijaykrishnan, M. Kandemir, and M. J. Irwin. In Proc. ACM SIGPLAN/SIGBED 2004 Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES'04), Washington, DC, June 2004.
[10] Tracking object life cycle for leakage energy optimization, by G. Chen, N. Vijaykrishnan, M. Kandemir, M. J. Irwin and M. Wolczko. In Proc. CODES-ISSS Merged Conference (CODES/ISSS'03), Newport Beach, California, October 1-3, 2003.
[11] Heap compression for memory-constrained Java environments, by G. Chen, M. Kandemir, N. Vijaykrishnan, M. J. Irwin, B. Mathiske, and M. Wolczko. In Proc. 18th Annual ACM SIGPLAN Conference on Object-Oriented Programming, Systems, Languages, and Applications (OOPSLA'03), Anaheim, California, October, 2003.
[12] Energy-aware code cache management for memory-constrained Java devices, by G. Chen, G. Chen, M. Kandemir, N. Vijaykrishnan, and M. J. Irwin. In Proc. IEEE International SOC Conference (ASIC/SOC'03), September 17-20, 2003, Portland, Oregon.
[13] Energy-aware compilation and execution in Java-enabled mobile devices, by G. Chen, B. Kang, M. Kandemir, N. Vijaykrishnan, M. J. Irwin, and R.Chandramouli. In Proc. 17th International Parallel and Distributed Processing Symposium (IPDPS'03), Nice, France, April 2003.
[14] PennBench: a benchmark suite for embedded Java, by G. Chen, M. Kandemir, N. Vijaykrishnan, M. J. Irwin. In Proc. 5th Workshop on Workload Characterization (WWC5), Austin, TX, November 2002.
[15] Adaptive garbage collection for battery-operated environments, by G. Chen, M. Kandemir, N. Vijaykrishnan, M. J. Irwin and M. Wolczko. In Proc. 2nd USENIX Java Virtual Machine Research and Technology Symposium (JVM'02), August 1-2, 2002.
[16] Energy savings through compression in embedded Java environments, by G. Chen, M.Kandemir, N. Vijaykrishnan and W. Wolf, In Proc. 10th International Symposium on Hardware/Software Codesign (CODES'02), Colorado, USA May 6-8, 2002.
[17] Tuning garbage collection in an embedded Java environment, by G. Chen, R. Shetty, M. Kandemir, N. Vijaykrishnan, M. J. Irwin,and M. Wolczko. In Proc. 8th International Symposium on High-Performance Computer Architecture (HPCA'02), Cambridge, MA, February 2-6, 2002.
[18] Reducing NoC Energy Consumption Through Compiler-Directed Channel Voltage Scaling, by G. Chen, F. Li, M. Kandemir, and M. J. Irwin. In Proc. Conference on Programming Language Design and Implementation (PLDI’06), Ottawa, Canada, June, 2006.
[19] Compiler-directed channel allocation for saving power in on-chip networks, by G. Chen, F. Li, and M. Kandemir. In Proc. Symposium on Principle of Programming Languages (POPL’06), Charleston, SC, January 2006.
[20] Compiler-directed voltage scaling on communication links for reducing power consumption, by F. Li, G. Chen, and M. Kandemir. In Proc. International Conference on Computer Aided Design (ICCAD’05), San Jose, CA, November 2005.
[21] Compiler-directed proactive power management for networks, by F. Li, G. Chen, M. Kandemir, and M. J. Irwin, In Proc. International Conference on Compilers, Architectures and Synthesis of Embedded Systems (CASES’05), San Francisco, CA, September 2005.
[22] Exploiting last idle periods of links for network power management, by F. Li, G. Chen, M. Kandemir, and M. Karakoy. In Proc. EMSOFT 2005, Jersey City, NJ, September 2005.
[23] Exploiting inter-processor data sharing for improving behavior of multi-processor SoCs, by G. Chen, G. Chen, O. Ozturk, and M. Kandemir. In Proc. IEEE Computer Society Annual Symposium on VLSI (ISVLSI'05), Tampa, Florida, May 2005.
[24] Optimizing instruction TLB energy using software and hardware techniques. I. Kadayif, A. Sivasubramaniam, M. Kandemir, G. Kandiraju, G. Chen, and G. Chen. ACM Transactions on Design Automation of Electronic Systems (TODAES), Volume 10, Number 2, pp. 229-257, April 2005.
[25] Designing energy aware sensor systems, by N. Vijaykrishnan, M. J. Irwin, M. Kandemir, L. Li and G. Chen. Frontiers of Distributed Sensor Networks (Ed: R. R. Brooks and S. S. Iyengar), CRC Press.
[26] Dynamic Scratch-Pad Memory Management for Irregular Array Access Patterns, by G. Chen, O. Ozturk, M. Kandemir, and M. Karakoy. Design Automation and Test in Europe (DATE'06), Munich, Germany, March 2006.
[27] Activity clustering for leakage management in SPMs, by M. Kandemir, G. Chen, F. Li, M. J. Irwin, and I. Kolcu. In Proc. Design Automation and Test in Europe (DATE'06), Munich, Germany, March 2006.
[28] Compiler-guided data compression for reducing memory consumption of embedded applications, by O. Ozturk, G. Chen, M. Kandemir, and I. Kolcu. In Proc. 11th Asia and South Pacific Design Automation Conference (ASP-DAC’06), Yokohama City, Japan, January 2006.
[29] Improving scratch-pad memory reliability through compiler-guided block duplication, by F. Li, G. Chen, M. Kandemir, and I. Kolcu. In Proc. International Conference on Computer Aided Design (ICCAD'05), San Jose, CA, November, 2005.
[30] Dataflow analysis for energy-efficient scratch-pad memory management, by G. Chen and M. Kandemir. In Proc. International Symposium on Low Power Electronics and Design (ISLPED'05), San Diego, California, August 2005.
[31] Compiling for memory emergency, by M. Kandemir, G. Chen, and I. Kadayif. In Proc. ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES'05), Chicago, Illinois, June 2005.
[32] An adaptive locality-conscious process scheduler for embedded systems, by G. Chen, G. Chen, O. Ozturk, M. Kandemir. In Proc. 11th IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS'05), San Francisco, California, March 7 - 10, 2005
[33] Studying storage-recomputation tradeoffs in memory-constrained embedded processing, by M Kandemir, F. Li, G Chen and G. Chen. In Proc. Design Automation and Test in Europe (DATE'05), Munich, Germany, 2005
[34] Data compression for improving SPM behavior, by O. Ozturk, M. Kandemir, I. Demirkiran, G. Chen, and M. J. Irwin. In Proc. 41st Design Automation Conference (DAC'04), San Diego, CA, June 2004.
[35] A compiler approach for reducing data cache energy, by W. Zhang, M. Karakoy, M. Kandemir, and G. Chen. In Proc. 17th Annual ACM International Conference on Supercomputing (ICS'03), June 23-26, 2003, San Francisco, CA.
[36] Loop transformations for reducing data space requirements of resource-constrained applications, by P. Unnikrishnan, G. Chen, M. Kandemir, M. Karakoy, and I. Kolcu. In Proc. 10th Annual International Static Analysis Symposium (SAS'03), June 11-13, 2003, San Diego, CA.
[37] Interprocedural optimizations for improving data cache performance of array-intensive embedded applications, by W. Zhang, G. Chen, M. Kandemir, and M. Karakoy. In Proc. 40th Design Automation Conference (DAC'03), June 2-6, Anaheim, CA.
[38] Data space oriented scheduling in embedded systems, by M. Kandemir, G. Chen, W. Zhang, and I. Kolcu. In Proc. 6th Design Automation and Test in Europe Conference (DATE'03), Munich, Germany, March 2003.
[39] Generating physical addresses directly for saving instruction TLB energy, by I. Kadayif, A. Sivasubramaniam, M. Kandemir, G. Kandiraju, and G. Chen. In Proc. 35th Annual International Symposium on Microarchitecture (MICRO-35), Istanbul, Turkey, November 2002.
[40] Dynamic compilation for energy adaptation, by P. Unnikrishnan, G. Chen, M. Kandemir, and D. R Mudgett. In Proc. International Conference on Computer Aided Design (ICCAD'02), San Jose, CA, November 10-14, 2002.
[41] Locality-conscious process scheduling in embedded systems, by I. Kadayif, M. Kandemir, I. Kolcu, and G. Chen, In Proc. 10th International Symposium on Hardware/Software Codesign (CODES'02), Colorado, USA May 6-8, 2002.
[42] An evaluation of code and data optimizations in the context of disk power reduction, by M. Kandemir, S. W. Son, and G. Chen. In Proc. International Symposium on Low Power Electronics and Design (ISLPED'05), San Diego, California, August 2005.
[43] Power-aware code scheduling for clusters of active disks, by S. W. Son, G. Chen, and M. Kandemir. In Proc. International Symposium on Low Power Electronics and Design (ISLPED'05), San Diego, California, August 2005.
[44] Exposing disk layout to compiler for reducing energy consumption of parallel disk based systems, by S. W. Son, G. Chen, M. Kandemir, and A. Choudhary. In Proc. Symposium on Principles and Practice of Parallel Programming (PPoPP'05), Chicago, IL, June 2005.
[45] Disk layout optimization for reducing energy consumption, by S. W. Son, G. Chen, and M. Kandemir. In Proc. 19th ACM International Conference on Supercomputing (ICS'05), Cambridge, Massachusetts, June 2005.
[46] Compiler-based code partitioning for intelligent embedded disk processing, by G. Chen, G. Chen, M. Kandemir, A. Nadgir. In Proc. 16th International Workshop on Languages and Compilers for Parallel Computing (LCPC'03), pp. 451-465, College Station, Texas, October 2-4, 2003.