Dimin Niu

Dimin Niu

Ph.D. Candidate
Department of Computer Science & Engineering
The Pennsylvania State University

Contact:
354B IST Building
University Park, PA 16802
Phone(O): (814)-863-7325
Email: dun118[AT]cse(dot)psu{dot}edu


Education


Research Interests

·         Computer Architecture

·         Non-Volatile Memory

·         VLSI Design

·         3D IC design


Publications

 

Conference Paper

·         Cong Xu, Dimin Niu, Shimeng Yu, Yuan Xie. Modeling and Design Analysis of 3D Vertical Resistive Memory- A Low Cost Cross-Point Architecture.to appear at Asia and South Pacific Design Automation Conference (ASPDAC), 2014.

·         Qiaosha Zou, Dimin Niu, Yan Cao, Yuan Xie. 3DLAT: TSV-based 3D ICs crosstalk minimization utilizing Less Adjacent Transition code. to appear at Asia and South Pacific Design Automation Conference (ASPDAC), 2014.

·         Dimin Niu, Qiaosha Zou, Cong Xu, Yuan Xie. Low Power Multi-Level-Cell Resistive Memory Design with Incomplete Data Mapping. to appear at International Conference on Computer Design (ICCD), 2013.

·         Dimin Niu, Cong Xu, Naveen Muralimanohar, Norm Jouppi, Yuan Xie. Design of Cross-point Metal-oxide ReRAM Emphasizing Reliability and Cost. to appear at International Conference on Computer-Aided Desig (ICCAD), 2013.

·         Cong Xu, Dimin Niu, Naveen Muralimanohar, Norm Jouppi, Yuan Xie. Understanding the Trade-offs in Multi-Level Cell ReRAM Memory Design. in IEEE Design Automation Conference (DAC), 2013.

·         Dimin Niu, Cong Xu, Naveen Muralimanohar, Norm Jouppi, Yuan Xie. Design Trade-Offs for Low-Power, High Density Cross-Point Resistive Memory. in ACM/IEEE International Symposium on Low Power Electronics and Design (ISLPED), 2012.

·         Dimin Niu, Yang Xiao, Yuan Xie. Low Power Memristor-Based ReRAM Design with Error Correcting Code. in Asia and South Pacific Design Automation Conference (ASPDAC), 2012. (34.4% acceptance rate(99/288))

·         Jue Wang, Xiangyu Dong, Guangyu Sun, Dimin Niu, Yuan Xie. Energy-Efficient Multi-Level Cell Phase-Change Memory System with Data Encoding. in International Conference on Computer Design (ICCD), 2011.

·         Cong Xu, Dimin Niu, Xiaochun Zhu, Seung H. Kang, Matt Nowak, Yuan Xie. Device-Architecture Co-Optimization of STT-RAM Based Memory for Low Power Embedded Systems. in International Conference on Computer-Aided Desig (ICCAD), 2011.

·         Jin Ouyang, Chuan Yang, Dimin Niu, Yuan Xie, Zhiwen Liu. F^2BFLY: An On-Chip Free-Space Network with Wavelength Switching. in International Conference on Supercomputing (ICS), 2011.

·         Guangyu Sun, Dimin Niu, Jin Ouyang, Yuan Xie. A Frequent-Value Based PRAM Memory Architecture. in Asia and South Pacific Design Automation Conference (ASPDAC), 2011.

·         Yibo Chen, Dimin Niu, Yuan Xie, Krishnendu Chakrabarty. Cost-Effective Integration of Three-Dimensional (3D) ICs Emphasizing Testing Cost Analysis. in International Conference on Computer-Aided Desig (ICCAD), 2010.

·         Dimin Niu, Yiran Chen, Yuan Xie. Low-power Dual-element Memristor-Based Memory Design. in ACM/IEEE International Symposium on Low Power Electronics and Design (ISLPED), 2010. (25% acceptance rate(50/200))

·         Dimin Niu, Yiran Chen, Cong Xu, Yuan Xie. Impact of Process Variations on Emerging Memristor. in IEEE Design Automation Conference (DAC), 2010. (24.4% acceptance rate(148/607))

·         Dimin Niu, Yibo Chen, Xiangyu Dong, Yuan Xie. Energy and Performance Driven Circuit Design for Emerging Phase-Change Memory. in Asia and South Pacific Design Automation Conference (ASPDAC), 2010. (35.0% acceptance rate(119/340))

·         Yongsoo Joo, Dimin Niu, Xiangyu Dong, Guangyu Sun, Naehyuck Chang, and Yuan Xie. Energy- and Endurance-Aware Design of Phase Change Memory Caches. in IEEE Design Automation and Test in Europe Conference (DATE), 2010.

·         Guangyu Sun, Yongsoo Joo, Yibo Chen, Dimin Niu, Yuan Xie, Yiran Chen, Hai Li. A Hybrid Solid-State Storage Architecture for the Performance, Energy Consumption, and Lifetime Improvement. in International Symposium on High-Performance Computer Architecture (HPCA), 2010.

·         Dimin Niu, Kewu Peng, Jian Song, Zhixing Yang. LDPC coded modulation with unequal protection. in International Conference on Communications, Circuit and Systems (ICCCAS), 2008.

·         Dimin Niu, Kewu Peng, Jian Song, Changyong Pan, Zhixing Yang. Multi-Rate LDPC Decoder Implementation for China Digital Television Terrestrial Broadcasting Standard. in International Conference on Communications, Circuit and Systems (ICCCAS), 2007.

Workshop Paper

·         Dimin Niu, Yang Xiao, Yuan Xie. Low Power Memristor-Based ReRAM Design with Error Correcting Code .in the SRC TECHCON, 2012.

·         Dimin Niu, Cong Xu, Naveen Muralimanohar, Norm Jouppi, Yuan Xie. Design Space Exploration for Cross-Point Resistive Memory. in Non-Volatile Memories Workshop (NVMW), 2012.

·         Dimin Niu, Yang Xiao, Yuan Xie. Error Correcting Code for Power-Efficient ReRAM Designs. in Non-Volatile Memories Workshop (NVMW), 2012.

·         Cong Xu, Xiaochun Zhu, Dimin Niu, Yuan Xie, Seung H. Kang. Device-Architecture Co-optimization of STT-RAM. in Non-Volatile Memories Workshop (NVMW), 2011.

Book Chapter

·         Yiran Chen, Hai Li, Yuan Xie, and Dimin Niu. Low Power Design of Emerging Memory Technologies. Handbook of Energy-Aware and Green Computing. Edited by Ishfaq Ahmad and Sanjay Ranka. CRC Press.


Graduate Courses

·         CSE578 CAD Tools

·         CSE539 Topics in Computer Architecture

·         CMPEN411 Digital Integrated Circuits

·         CSE514 Computer Networks

·         STAT501 Regression Methods


Last modified: 1/18/2013