Circuit Schematic Diagram for the TIQ Flash ADCs in the First Prototype Chip

The first prototype chip contains the following six ADCs:
  1. 6bit high speed ADC
  2. 6bit lower power ADC
  3. 8bit high speed ADC
  4. 8bit lower power ADC
  5. 9bit high speed ADC
  6. 9bit lower power ADC
The basic circuit schematic diagram for the above six TIQ Flash ADCs are same as that of the 3bit TIQ Flash ADC circuit schematic diagram shown below in Figure 1. The specific circuit schematic diagram for each of the six TIQ Flash ADCs are specified in Table 1 below.


Figure 1. A 3bit TIQ Flash ADC Circuit
 
 
 
 
 

Table 1.   The specific circuit schematic diagrams different from the 3bit TIQ Flash ADC circuit.

 
Number of comparators
Gain booster
ROM size
Fig 1,  3bit ADC circuit
7
4 inverters
7 X 3
6bit high speed ADC
63
2 inverters
63 X 6
6bit lower power ADC
63
2 inverters
63 X 6
8bit high speed ADC
255
4 inverters
255 X 8
8bit lower power ADC
255
4 inverters
255 X 8
9bit high speed ADC
511
4 inverters
511 X 9
9bit lower power ADC
511
4 inverters
511 X 9

The layout design of the TIQ Flash ADC follows closely with the shown circuit diagram.  A row layout is designed, and the rows are stacked.    A row consists of a comparator, a gain booster, a 0-1 generator, and a ROM (one row).
In the first prototype chip, each of the ADC layouts are added with two dummy rows, one at the top of the stack and one at the bottom of the stack.