Instructor: Anand Sivasubramaniam (anand@cse)
Class Hours: T R 04:15P - 05:30P in 118 EES
Office: 354A IST
Office Hours: 2:30-3:30 TR or by appointment
Overview
This course will cover architectural issues for parallel computing,
including parallel program design for performance, performance
metrics, shared memory and message passing issues, interconnection
network design, and latency tolerance techniques.
It assumes that students are already familiar with the
material covered in CSE 431 (and to a certain extent in CSE 530)
including processor architectures, pipelining, caches and
memory hierarchies, and I/O system architectures.
The text for this course is "Parallel Computer Architecture:
A Hardware/Software Approach" by D.E. Culler, J. P. Singh and A. Gupta
(published by Morgan Kaufmann).
Projects and exams will include all material covered in the lectures
and active class participation is essential.
Projects
In addition to learning the concepts in class, you will be working
with a commercial simulator (Simics) - using it for architectural
studies as well as adding/changing modules for architectural enhancements.
There will be 2 programming projects for the course and a detailed
description of each project will be handed out separately.
The project reports are due in class on the designated day (no extensions
will be given).
All projects should be implemented on SUN workstations running Solaris
using Simics.
Appropriate documentation/manuals for will be made available.
You will be working in teams (atmost 2 per team) for each of the
projects. You are free to choose your partner for each of the projects
(could be different for each project).
If either of you choose to drop out of your team for any reason at any time,
each of you will be individually responsible for implementing and
demonstrating the entire project and writing the project report by
the designated deadline. In any case, both of you will need to understand
and be able to explain the entire design and implementation even though
you may have worked on only one part of the project.