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PAS Papers 2002

CSE MDL Temperature and Power Aware Systems Publications of 2002

  • G. Chen, M. Kandemir, N. Vijaykrishnan, M. J. Irwin, PennBench: A Benchmark Suite for Embedded Java, Proc. of the 5th IEEE Workshop on Workload Characterization (WWC'02), Nov. 2002.
  • G. Chen, M. Kandemir, N. Vijaykrishnan, M. J. Irwin, M. Wolczko, Tuning Garbage Collection for Reducing Memory System Energy in an Embedded Java Environment, ACM Trans. on Embedded Computer Systems, 1(1):27-55, Nov. 2002.
  • G. Chen, M. Kandemir, N. Vijaykrishnan, M. J. Irwin, W. Wolf, Using Memory Compression for Energy Reduction in an Embedded Java System, Journal of Circuits, Systems and Computers, 11(5):537-556, Oct. 2002.
  • W. Zhang, J. Hu, V. Degalahal, M. Kandemir, N. Vijaykrishnan, M. J. Irwin, Compiler-directed Instruction Cache Leakage Optimization, Proc. of MICRO-35, pp. 208-218, Nov. 2002.
  • N. Vijaykrishnan, M. Kandemir, A. Sivasubramaniam, M. J. Irwin, Tools and Techniques for Integrated Hardware-Software Energy Optimizations, in Power Aware Design Methodologies, Ed. by Rabaey and Pedram, pp. 277-295, Kluwer, 2002.
  • M. Kandemir, N. Vijaykrishnan, M. J. Irwin, Compiler Optimizations for Low-Power Systems, in Power Aware Computing, Ed. by Graybill and Melhem, pp. 191-210, Kluwer, 2002.
  • W. Xu, A. Parikh, M. Kandemir, M. J. Irwin, Fine-Grain Instruction Scheduling for Low Energy, Proc. of SiPS’02, pp. 258-263, Oct. 2002.
  • J. Zhao, R. Chandramouli, N. Vijaykrishnan, M. J. Irwin, B. Kang, S. Somasundaram, Influence of MPEG-4 Parameters on System Energy, Proc. of ASIC’02, pp. 137-142, Sep. 2002.
  • G. Essakimuthu, N. Vijaykrishnan, M. J. Irwin, An Analytical Power Estimation Model for Crossbar Interconnects, Proc. of ASIC’02, pp.119-123, Sep. 2002.
  • R. Ramanarayanan, N. Vijaykrishnan, M. J. Irwin, Characterizing Dynamic and Leakage Power Behavior in Flip-Flops, Proc. of ASIC’02, pp. 433-437, Sep. 2002.
  • D. Duarte, N. Vijaykrishnan, M. J. Irwin, Impact of Technology Scaling and Packaging on Dynamic Voltage Scaling Techniques, Proc. of ASIC’02, pp. 244-248, Sep. 2002.
  • D. Duarte, N. Vijaykrishnan, M. J. Irwin, A Clock Power Model to Evaluate Impact of Architectural and Technology Optimizations, IEEE Trans. on VLSI Systems, 10(6):844-855, Dec. 2002. IEEE/CAS Best Paper Award Winner.
  • S. Kim, N. Vijaykrishnan, M. Kandemir, M. J. Irwin, Predictive Precharging for Bitline Leakage Energy Reduction, Proc. of ASIC’02, pp. 36-40, Sep. 2002.
  • L. Lin, I. Kadayif, Y-F. Tsai, N. Vijaykrishnan, M. Kandemir, M. J. Irwin, A. Sivasubramaniam, Leakage Energy Management in Cache Hierarchies, Proc. of 11th Conf. on Parallel Architectures and Compilation Techniques (PACT), pp. 131-140. Sep. 2002.
  • D. Duarte, N. Vijaykrishnan, M. J. Irwin, H. Kim, G. McFarland, Scaling of the Effectiveness of Power Reduction Schemes and the Impact of Temperature Management, Proc. of ICCD’02, pp. 382-387, Sep. 2002.
  • G. Chen, M. Kandemir, N. Vijaykrishnan, M. J. Irwin, M. Wolczko, Adaptive Garbage Collection for Battery-Operated Environments, Proc. of 2nd JVM Conf., pp. 1-12, Aug. 2002.
  • V. Delaluz, A. Sivasubramaniam, M. Kandemir, N. Vijaykrishnan, M. J. Irwin, Scheduler-Based DRAM Energy Management, Proc. of 39th DAC, pp. 697-702, June 2002.
  • J. Hu, M. Kandemir, N. Vijaykrishnan, M. J. Irwin, H. Saputra, W. Zhang, Compiler-Directed Cache Polymorphism, Proc. of LCTES'02 and SCOPES'02, pp. 165-174, June 2002.
  • H. Saputra, M. Kandemir, N. Vijaykrishnan, M. J. Irwin, J. S. Hu, C-H. Hsu, U. Kremer, Energy-Conscious Compilation Based on Voltage Scaling, Proc. of LCTES'02 and Software and Compilers for Embedded Systems (SCOPES), pp. 2-10, June 2002.
  • G. Chen, M. Kandemir, N. Vijaykrishnan, M. J. Irwin, W. Wolf, Energy Savings Through Compression in Embedded Java Environments, Proc. of 10th Conf. on Hardware/Software Codesign (CODES), pp. 163-168, May 2002.
  • B-T Kang, N. Vijaykrishnan, M. J. Irwin, R. Chandramouli, Power Efficient Adaptive M-QAM Design Using Adaptive Pipelined Analog-to-Digital Converter, Proc. of ICASSP’02,(CD ROM), May 2002.
  • I. Kadayif, M. Kandemir, N. Vijaykrishnan, M. J. Irwin, Hardware-Software Co-Adaption for Data-Intensive Embedded Applications, Proc. of ISVLSI’02, pp. 20-25, Apr. 2002.
  • D. Duarte, N. Vijaykrishnan, M. J. Irwin, Y-F Tsai, Impact of Technology Scaling on the Clock System Power, Proc. of the Symp. on VLSI (ISVLSI), pp. 59-64, Apr. 2002.
  • A. Sivasubramaniam, M. Kandemir, N. Vijaykrishnan, M. J. Irwin, Designing Energy-Efficient Software, Proc. of the Next Generation Software Workshop, held in conjunction with IPDPS, p. 176, April 2002.
  • I. Kadayif, N. Orr, M. Kandemir, N. Vijaykrishnan, M. J. Irwin, Instruction Selection/Scheduling Using an Energy-aware Instruction Set Architecture, Proc. of 6th Workshop of Languages, Compilers, and Runtime Systems for Scalable Computers (LCR), pp. 1-10, Mar. 2002.
  • D. Duarte, N. Vijaykrishnan, M. J. Irwin, A Complete Phase-Locked Loop Power Consumption Model, Proc. of DATE’02, p. 1108, Mar. 2002.
  • J. Hu, N. Vijaykrishnan, M. Kandemir, M. J. Irwin, Power-Efficient Trace Caches, Proc. of DATE’2002, p. 1091, Mar. 2002.
  • I. Kadayif, M. Kandemir, N. Vijaykrishnan, M. J. Irwin, A. Sivasubramaniam, EAC: A Compiler Framework for High-Level Energy Estimation and Optimization, Proc. of the Inter. Conf. on Design Automation and Test in Europe (DATE), pp. 436-442, Mar. 2002.
  • S. Gurumurthi, A. Sivasubramaniam, M. J. Irwin, N. Vijaykrishnan, M. Kandemir, T. Li, L. K. John, Using Complete Machine Simulation for Software Power Estimation: The SoftWatt Approach, Proc. of HPCA-8, pp. 141-150, Feb. 2002.
  • G. Chen, R. Shetty, M. Kandemir, N. Vijaykrishnan, M. J. Irwin, M. Wolczko, Tuning Garbage Collection in an Embedded Java Environment, Proc. of HPCA-8, pp. 92-103, Feb. 2002.
  • D. Duarte, Y-F. Tsai, N. Vijaykrishnan, M. J. Irwin, Evaluating Run-Time Techniques for Leakage Power Reduction, Proc. of ASPDAC'02 and VLSI’02, pp. 31-38, Jan. 2002.
  • V. Delaluz, M. Kandemir, N. Vijaykrishnan, M. J. Irwin, A. Sivasubramaniam, I. Kolcu, Compiler-Directed Array Interleaving for Reducing Energy in Multi-Bank Memories, Proc. of the Seventh Asia and South Pacific Design Automation Conf (ASPDAC) and VLSI’02, pp. 288-293, Jan. 2002.
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