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PAS Papers 2001

CSE MDL Temperature and Power Aware Systems Publications of 2001

  • M. Kandemir, N. Vijaykrishnan, M. J. Irwin, W. Ye, Influence of Compiler Optimizations on System Power, IEEE Trans. on VLSI Systems, 9(6):801-804, Dec. 2001.
  • N. Kirubanandan, A. Sivasubramaniam, N. Vijaykrishnan, M. Kandemir, M. J. Irwin, Memory Energy Characterization and Optimization for the SPEC2000 Benchmarks, Proc. of the 4th Workshop on Workload Characterization (WWC-4), held in conjunction with MICRO-34, pp. 193-201, Dec. 2001.
  • W. Zhang, N. Vijaykrishnan, M. Kandemir, M. J. Irwin, D. Duarte, Y. Tsai, Exploiting VLIW Schedule Slacks for Dynamic and Leakage Energy Reduction, Proc. of the 34th Symp, on Microarchitecture (MICRO-34), pp. 102-113, Dec. 2001.
  • S. Kim, N. Vijaykrishnan, M. Kandemir, M. J. Irwin, Energy-Efficient Instruction Cache Using Page-Based Placement, Proc. of CASES'01, pp. 229-237, Nov. 2001.
  • V. Delaluz, M. Kandemir, N. Vijaykrishnan, A. Sivasubramaniam, M. J. Irwin, Hardware and Software Techniques for Controlling DRAM Power Modes, IEEE Trans. on Computers, special issue on Advances in High Performance Memory Systems, 50(11):1154-1173, Nov. 2001.
  • J. Hezavei, N. Vijaykrishnan, M. J. Irwin, M. Kandemir, Input Sensitive High-Level Power Analysis, Proc. of SiPS’01, pp. 149-156, Sep. 2001.
  • S. Tomar, S.T. Kim, N. Vijaykrishnan, M. Kandemir, M. J. Irwin, Use of Local Memory for Efficient Java Execution, Proc. of ICCD’01, pp. 468-473, Sep. 2001.
  • H.S. Kim, N. Vijaykrishnan, M. Kandemir, M. J. Irwin, A Framework for Exploring Energy-Efficient VLIW Architectures, Proc. of ICCD’01, pp. 40-45, Sep. 2001.
  • D. Duarte, N. Vijaykrishnan, M. J. Irwin, M. Kandemir, Evaluating the Impact of Architectural-Level Optimizations on Clock Power, Proc. of ASIC’01, Sep. 2001.
  • G. Thirugnanam, N. Vijaykrishnan, M. J. Irwin, A Novel Low Power CAM Design, Proc. of ASIC’01, Sep. 2001.
  • N. An, A. Sivasubramaniam, N. Vijaykrishnan, M. Kandemir, M. J. Irwin, S. Gurumurti, Analyzing Energy Behavior of Spatial Access Methods for Memory-Resident Data, Proc. of the Conf. on Very Large Databases, pp. 411-420, Sep. 2001.
  • S.T. Kim, N. Vijaykrishnan, M. Kandemir, A. Sivasubramaniam, M. J. Irwin, E. Geethanjali, Power-aware Partitioned Cache Architectures, Proc. of ISLPED’01, pp. 64-67, Aug. 2001.
  • A. Parikh, M. Kandemir, N. Vijaykrishnan, M. J. Irwin, and I. Kadayif. Energy-Conscious Instruction Scheduling for VLIW Architectures, Proc. of the 9th Workshop on Compilers for Parallel Computers (CPC), pp. 303-312, June 2001.
  • I. Kadayif, T. Chinoda, M. Kandemir, N. Vijaykrishnan, M. J. Irwin, A. Sivasubramaniam, vEC: Virtual Energy Counters, Proc. ACM Workshop on Program Analysis for Software Tools and Engineering (PASTE), pp. 28-31, June 2001.
  • I. Kadayif, M. Kandemir, N. Vijaykrishnan, M. J. Irwin, J. Ramanujam, Morphable Cache Architectures: Potential Benefits, Proc. of LCTES’2001, pp. 128-137, June 2001.
  • M. Kandemir, J. Ramanujam, M. J. Irwin, V. Narayanan, I. Kadayif, A. Parikh, Dynamic Management of Scratch-pad Memory Space, Proc. of 38th DAC, pp. 690-695, June 2001.
  • P. Khosla, H. Schmit, T. Cain, S. Levitain, M. J. Irwin, N. Vijaykrishnan, D. Landis, SoC? Design Skills: Collaboration Builds a Stronger SoC? Design Team, Proc. of the 2001 Conf. on Microelectronic Systems Education (MSE), pp. 42-43, June 2001.
  • H.S. Kim, M. Kandemir, N. Vijaykrishnan, M. J. Irwin, Characterization of Memory Energy Behavior, in Characterization of Contemporary Workloads, pp. 165-180, Ed. John and Grizzaffi-Maynard, Kluwer, May 2001.
  • S. Tomar, N. Vijaykrishnan, M. Kandemir, R. Shetty, M. J. Irwin, Energy Optimization Using Object Co-Location in Java, Proc. of Java Optimization Strategies for Embedded Systems Workshop (JOSES), held in conjunction with ETAPS’2001, pp. 9-15, Apr. 2001.
  • A. Parikh, M. Kandemir, N. Vijaykrishnan, M. J. Irwin, VLIW Scheduling for Energy and Performance, Proc. of WVLSI, pp. 111-117, Apr. 2001.
  • R. Athavale, N. Vijaykrishnan, M. Kandemir, M. J. Irwin, Influence of Array Allocation Mechanisms on Memory System Energy, Proc. of the 15th Parallel and Distributed Processing Symposium (IPDPS), p. 3 (full paper on CD-ROM), Apr. 2001.
  • N. Vijaykrishnan, N., M. Kandemir, S.T. Kim, S. Tomar, A. Sivasubramaniam, M. J. Irwin, Energy Behavior of Java Applications from the Memory Perspective, _Proc. of the Java Virtual Machine Research & Technology Symposium _(JVM), pp. 207-220, Apr. 2001.
  • G. Esakkimuthu, H.S. Kim, M. Kandemir, N. Vijaykrishnan, M. J. Irwin, Investigating Memory System Energy Behavior Using Software and Hardware Optimizations, VLSI Design Journal, 12(2):151-165, Feb. 2001.
  • D. Duarte, N. Vijaykrishnan, M. J. Irwin, M. Kandemir, Formulation and Validation of an Energy Dissipation Model for the Clock Generation Circuitry and Distribution Networks, Proc. of VLSI’01, pp. 248-253, Jan. 2001.
  • B. Bishop, V. Lyuboslavsky, N. Vijaykrishnan, M. J. Irwin, Design Considerations for Databus Charge Recovery, IEEE Trans. on VLSI Systems, 9(1):104-106, Jan. 2001.
  • R. Chen, M. J. Irwin, R. Bajwa, Architecture Level Power Estimation and Design Experiments, ACM Trans. on Design Automation of Electronic Systems, 6(1):50-66, Jan. 2001.
  • V. Delaluz, M. Kandemir, N. Vijaykrishnan, A. Sivasubramaniam, M. J. Irwin, DRAM Energy Management Using Software and Hardware Directed Power Mode Control, Proc. of the 7th Symp. on High Performance Computer Architecture (HPCA), pp. 159-169, Jan. 2001.
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