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PAS Papers 2000

CSE MDL Temperature and Power Aware Systems Publications of 2000

  • V. Delaluz, M. Kandemir, N. Vijaykrishnan, M. J. Irwin, Energy-Oriented Compiler Optimizations for Partitioned Memory Architectures, Proc. of the 3rd Conf. on Compilers, Architectures and Synthesis for Embedded Systems (CASES), pp. 138-147, Nov. 2000.
  • H.S. Kim, M. J. Irwin, N. Vijaykrishnan, M. Kandemir, Effect of Compiler Optimizations on Memory Energy, Proc. of SiPS'00, pp. 663-672, Oct. 2000.
  • M. Kandemir, N. Vijaykrishnan, M. J. Irwin, W. Ye, I. Demirkiran, Register Relabeling: A Post Compilation Technique for Energy Reduction, Proc. of the Workshop on Compilers and Operating Systems for Low Power (COLP), Oct. 2000.
  • M. J. Irwin, M. Kandemir, N. Vijaykrishnan, A. Sivasubramaniam, A Holistic Approach to System Level Energy Optimization, Invited, Proc. of the 10th Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS), Springer-Verlag LNCS, 1918:88-107, Sep. 2000.
  • V. Lyuboslavsky, B. Bishop, N. Vijaykrishnan, M. J. Irwin, Design of Databus Charge Recovery Mechanisms, Proc. of ASIC’00, pp. 283-287, Sep. 2000.
  • D. Duarte, M. J. Irwin, N. Vijaykrishnan, Modeling Energy of the Clock Generation and Distribution Circuitry, Proc. of ASIC’00, pp. 261-265, Sep. 2000.
  • M. Kandemir, N. Vijaykrishnan, M. J. Irwin, H.S. Kim, Experimental Evaluation of Energy Behavior of Iteration Space Tiling, Proc. of the 13th Workshop on Languages and Compilers for Parallel Computing (LCPC), Springer-Verlag LNCS, Aug. 2000.
  • G. Esakkimuthu, N. Vijaykrishnan, M. Kandemir, M. J. Irwin, Memory System Energy: Influence of Hardware-Software Optimizations, Proc. of ISLPED’00, pp. 244-246, July 2000.
  • M. Kandemir, N. Vijaykrishnan, M. J. Irwin, H.S. Kim, Towards Energy Aware Iteration Space Tiling, Proc. of ACM Workshop on Languages, Compilers, and Tools for Embedded Systems (LCTES), Springer-Verlag LNCS 1985, pp. 211-215, 2000.
  • N. Vijaykrishnan, M. Kandemir, M. J. Irwin, H.S. Kim, W. Ye, Energy-Driven Integrated Hardware-Software Optimization Using SimplePower, Proc. of 27th ISCA, pp. 95-106, June 2000.
  • W. Ye, N. Vijaykrishnan, M. Kandemir, M. J. Irwin, The Design and Use of SimplePower: A Cycle-Accurate Energy Estimation Tool, Proc. of 37th DAC, pp. 340-345, June 2000.
  • M. Kandemir, N. Vijaykrishnan, M. J. Irwin, W. Ye, Influences of Compiler Optimizations on System Power, Proc. of 37th DAC, pp. 304-307, June 2000.
  • A. Parikh, M. Kandemir, N. Vijaykrishnan, M. J. Irwin, Instruction Scheduling Based on Energy and Performance Constraints, Proc. of WVLSI’00, pp. 53-58, Apr. 2000.
  • H.S Kim, N. Vijaykrishnan, M. Kandemir, M. J. Irwin, Multiple Access Caches: Energy Implications, Proc. of the WVLSI’00, pp. 37-42, Apr. 2000.
  • J. Hezavei, N. Vijaykrishnan, M. J. Irwin, A Comparative Study of Power Efficient SRAM Designs, Proc. of GLSVLSI’00, pp. 117-122, Mar. 2000.
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