HPCA 2010 Workshop on the Use of Emerging Storage and Memory Technologies (WEST)
Call for Papers
(Submission deadline extended to Nov 15, 2009. Please read the revised submission instructions below)
In designing computer systems, flash memory as well as
emerging storage class memories such as phase change memory require
new hardware and software designs for higher performance, reliability
and lower power consumption. Due to the
varied ways such storage and memory can be used (for caching, for
higher
IOPs,
etc) and the associated shift in constraints (possibly challenging
certain
long standing assumptions from previous technologies), the design of
computer
systems is likely to change substantially
in areas such as file systems, data bases and virtual
memory. Potential
applications that benefit from these technologies span a wide range of
systems and workloads from laptops/PCs to storage/database servers,
HPC checkpointing to emerging data-centric "warehouse" computing
environments.
The main goal of this workshop is to bring together people from
industry
and
academia who are interested in all aspects of hardware and software
computer systems design using such emerging storage and memory
technologies
and any support needed for pursuing research in this area. The
workshop will provide a forum to present and discuss new ideas, new
research directions, and current trends in this area.
Topics of Interest
The topics of the workshop include, but are not limited to, the
following areas:
- Impact of emerging storage and memory technologies on any aspect
of
computer systems design
- Flash and SCM storage designs
- Virtual Memory and SCMs (e.g. PCM, MRAM)
- Wear levelling in flash and SCM
- File system and database designs that exploit emerging memory and
storage technologies
- Use of flash/PCM in application and middle-ware persistence
store components (e.g. message queues, distributed object
caches,
key-value stores etc)
- Power management for flash/SCMs
- Use of specific types of non-volatile memories (FRAM, MRAM,
etc.) in systems design
- Exploiting flash/SCMs for enhancing fault tolerance
- Reliability modelling and empirical studies for flash/SCMs
- Security (or its lack) with flash/SCMs
- Novel applications of flash/SCM
Duration
Proposed length of the workshop: half a day (4 hours).
Scheduled for Saturday, Jan 9, 2010 (morning).
Paper Submission
NOTE: We have just extended the submission deadline to November 15th 2009,
but request authors who would like to avail of this extension to send us
a note rightaway indicating the tentative topic of their submission to enable
us to plan the reviews.
All paper submissions will be handled electronically. Papers in PDF
format should be submitted electronically by e-mail to
bsuparna@in.ibm.com or gopi@csa.iisc.ernet.in
no later than November 15, 2009 by 6pm PST. The papers should be
prepared using the 2-column ACM conference format, and no longer than 6 pages.
All the submitted papers will be reviewed by the program committee,
and acceptance will be based on standard criterion of research
merit. Submission of the paper implies that at least one of the
authors will register and present the paper at the workshop if the
paper is accepted. Submission inquiries should be sent to
bsuparna@in.ibm.com or gopi@csa.iisc.ernet.in.
The papers and presentations will be made available online.
However, publication in this workshop does not preclude later
publication in regular conferences and journals.
Important Dates
- (Revised) Submission deadline: November 15, 2009 6pm PST
- Acceptance notification: November 22, 2009
Program Committee
- Amrutur Bharadwaj (ECE, IISc Bangalore)
- Suparna Bhattacharya (IBM Systems and Technology Lab, Bangalore)
- Richard Freitas (IBM Almaden Research Center)
- K. Gopinath (CSA, IISc Bangalore)
- Sudhanva Gurumurthi (Univ. of Virginia)
- Adam Levanthal (Sun Microsystems)
- C.Mohan (IBM Almaden Research Center)
- Youjip Won (Hanyang Univ., Korea)
The organizers and their affiliations
- K. Gopinath, Professor at Indian Institute of Science, Bangalore
- Suparna Bhattacharya, Senior Technical Staff Member, IBM Systems
and Technology Lab, Bangalore.